Semiconductor device with high-k gate dielectric
View Patent ↗An integrated circuit includes a substrate, a first transistor, and a second transistor. The first transistor has a first gate dielectric portion located between a first gate electrode and the substrate. The first gate dielectric portion includes a first high-permittivity dielectric material and/or a second high-permittivity dielectric material. The first gate dielectric portion has a first equivalent silicon oxide thickness. The second transistor has a second gate dielectric portion located between a second gate electrode and the substrate. The second gate dielectric portion includes the first high-permittivity dielectric material and/or the second high-permittivity dielectric material. The second gate dielectric portion has a second equivalent silicon oxide thickness. The second equivalent silicon oxide thickness may be different than the first equivalent silicon oxide thickness.
1. An integrated circuit comprising:
a substrate;
a first transistor having a first gate dielectric portion located between a first gate electrode and the substrate, wherein the first gate dielectric portion comprises a first high-permittivity dielectric material, and wherein the first gate dielectric portion has a first equivalent silicon oxide thickness;
a second transistor having a second gate dielectric portion located between a second gate electrode and the substrate, wherein the second gate dielectric portion comprises the first high-permittivity dielectric material, wherein the second gate dielectric portion has a second equivalent silicon oxide thickness, and wherein the second equivalent silicon oxide thickness is different than the first equivalent silicon oxide thickness.
2. The integrated circuit of claim 1 , wherein the second gate dielectric portion further comprises a normal-permittivity dielectric material.
3. The integrated circuit of claim 1 , wherein the first gate dielectric portion further comprises the normal-permittivity dielectric material.
4. The integrated circuit of claim 3 , wherein the normal-permittivity dielectric material in the first gate dielectric portion has a first normal-permittivity-material thickness, wherein the normal-permittivity dielectric material in the second gate dielectric portion has a second normal-permittivity-material thickness, and wherein the first normal-permittivity-material thickness is different than the second normal-permittivity-material thickness.
5. The integrated circuit of claim 3 , wherein the second gate dielectric portion further comprises a second high-permittivity dielectric material, wherein the second high-permittivity dielectric material is different than the first high-permittivity dielectric material.
6. The integrated circuit of claim 5 , wherein the first gate dielectric portion further comprises the second high-permittivity dielectric material.
7. The integrated circuit of claim 6 , wherein the first high-permittivity dielectric material in the first gate dielectric portion has a first high-permittivity-dielectric-material thickness, wherein the first high-permittivity dielectric material in the second gate dielectric portion has a second high-permittivity-dielectric-material thickness, and wherein the second high-permittivity-dielectric-material thickness is different than the first high-permittivity-material thickness.
8. The integrated circuit of claim 7 , wherein the second high-permittivity dielectric material in the first gate dielectric portion has a third high-permittivity-dielectric-material thickness, wherein the second high-permittivity dielectric material in the second gate dielectric portion has a fourth high-permittivity-material thickness, and wherein the fourth high-permittivity-dielectric-material thickness is different than the third high-permittivity-material thickness.
9. The integrated circuit of claim 3 , wherein the first gate dielectric portion further comprises a second high-permittivity dielectric material, wherein the second high-permittivity dielectric material is different than the first high-permittivity dielectric material.
10. The integrated circuit of claim 9 , wherein the second gate dielectric portion further comprises a second high-permittivity dielectric material, wherein the second high-permittivity dielectric material is different than the first high-permittivity dielectric material.
11. The integrated circuit of claim 1 , wherein the first high-permittivity dielectric material in the first gate dielectric portion has a first high-permittivity-material thickness, wherein the first high-permittivity dielectric material in the second gate dielectric portion has a second high-permittivity-material thickness, and wherein the second high-permittivity-material thickness is different than the first high-permittivity-material thickness.
12. The integrated circuit of claim 11 , wherein the second gate dielectric portion further comprises a normal-permittivity dielectric material.
13. The integrated circuit of claim 11 , wherein the first gate dielectric portion further comprises a normal-permittivity dielectric material.
14. The integrated circuit of claim 1 , wherein the first gate dielectric portion further comprises a normal-permittivity dielectric material, and wherein the second gate dielectric portion further comprises a second high-permittivity dielectric material, wherein the second high-permittivity dielectric material is different than the first high-permittivity dielectric material.
15. The integrated circuit of claim 3 , wherein the second gate dielectric portion further comprises a second high-permittivity dielectric material, wherein the second high-permittivity dielectric material is different than the first high-permittivity dielectric material.
16. The integrated circuit of claim 15 , wherein the first gate dielectric portion further comprises the second high-permittivity dielectric material.
17. The integrated circuit of claim 16 , wherein the first high-permittivity dielectric material in the first gate dielectric portion has a first high-permittivity-material thickness, wherein the first high-permittivity dielectric material in the second gate dielectric portion has a second high-permittivity-material thickness, and wherein the second high-permittivity-material thickness is different than the first high-permittivity-material thickness.
18. The integrated circuit of claim 1 , wherein the first gate dielectric portion has a first actual thickness, wherein the second gate dielectric portion has a second actual thickness, and wherein the second actual thickness is about equal to the first actual thickness.
19. The integrated circuit of claim 1 , wherein the first gate dielectric portion has a first actual thickness, wherein the second gate dielectric portion has a second actual thickness, and wherein the second actual thickness is different than the first actual thickness.
20. The integrated circuit of claim 1 , wherein the substrate is selected from a group consisting of silicon, germanium, silicon-on-insulator, and combinations thereof.
21. The integrated circuit of claim 1 , wherein the first high-permittivity dielectric material is selected from a group consisting of metal oxides, metal nitrides, metal silicates, transition metal-oxides, transition metal-nitrides, transition metal-silicates, oxynitrides of metals, zirconium silicate, HfO 2 , ZrO 2 , HfO x N y , ZrO x N y , HfSi x O y , ZrSi x O y , HfSi x O y N z , ZrSi x O y N z , Al 2 O 3 , TiO 2 , Ta 2 O 5 , La 2 O 3 , CeO 2 , Bi 4 Si 2 O 12 , WO 3 , Y 2 O 3 , LaAlO 3 , Ba 1-x Sr x TiO 3 , PbTiO 3 , BaTiO 3 , SrTiO 3 , PbZrO 3 , PST, PZN, PZT, PMN, and combinations thereof.
22. The integrated circuit of claim 15 , wherein the second high-permittivity dielectric material is selected from a group consisting of metal oxides, metal nitrides, metal silicates, transition metal-oxides, transition metal-nitrides, transition metal-silicates, oxynitrides of metals, zirconium silicate, HfO 2 , ZrO 2 , ZrO x N y , HfO x N y , HfSi x O y , ZrSi x O y , HfSi x O y N z , ZrSi x O y N z , Al 2 O 3 , TiO 2 , Ta 2 O 5 , La 2 O 3 , CeO 2 , Bi 4 Si 2 O 12 , WO 3 , Y 2 O 3 , LaAlO 3 , Ba 1-x Sr x TiO 3 , PbTiO 3 , BaTiO 3 , SrTiO 3 , PbZrO 3 , PST, PZN, PZT, PMN, and combinations thereof.
23. The integrated circuit of claim 2 , wherein the normal-permittivity dielectric material is selected from a group consisting of silicon oxide, silicon oxynitride, silicon nitride, and combinations thereof.
24. The integrated circuit of claim 1 , wherein the first transistor is separated from the second transistor by an isolation structure selected from a group consisting of shallow trench isolation, localized oxidation of silicon (LOCOS), field oxide (FOX), silicon islands formed on a silicon-on-insulator (SOI) substrate, and combinations thereof.
25. An integrated circuit comprising:
a substrate;
a first transistor having a first gate dielectric portion located between a first gate electrode and the substrate, wherein the first gate dielectric portion comprises a first high-permittivity dielectric material; and
a second transistor having a second gate dielectric portion located between a second gate electrode and the substrate, wherein the second gate dielectric portion comprises a second high-permittivity dielectric material, and wherein the second high-permittivity dielectric material is different than the first high-permittivity dielectric material.
26. The integrated circuit of claim 25 , wherein the first gate dielectric portion has a first equivalent silicon oxide thickness, wherein the second gate dielectric portion has a second equivalent silicon oxide thickness, and wherein the second equivalent silicon oxide thickness is different than the first equivalent silicon oxide thickness.
27. The integrated circuit of claim 25 , wherein the second gate dielectric portion further comprises the first high-permittivity dielectric material.
28. The integrated circuit of claim 27 , wherein the first high-permittivity dielectric material in the first gate dielectric portion has a first high-permittivity-dielectric-material thickness, wherein the first high-permittivity dielectric material in the second gate dielectric portion has a second high-permittivity-dielectric-material thickness, and wherein the second high-permittivity-dielectric-material thickness is different than the first high-permittivity-material thickness.
29. The integrated circuit of claim 25 , wherein the first gate dielectric portion further comprises a normal-permittivity dielectric material.
30. The integrated circuit of claim 25 , wherein the second gate dielectric portion further comprises a normal-permittivity dielectric material.
31. The integrated circuit of claim 25 , wherein the first gate dielectric portion has a first equivalent silicon oxide thickness, wherein the second gate dielectric portion has a second equivalent silicon oxide thickness, and wherein the second equivalent silicon oxide thickness is about equal to the first equivalent silicon oxide thickness.
32. The integrated circuit of claim 25 , wherein the first gate dielectric portion has a first physical thickness, wherein the second gate dielectric portion has a second physical thickness, and wherein the second physical thickness is about equal to the first physical thickness.
33. The integrated circuit of claim 25 , wherein the substrate is selected from a group consisting of silicon, germanium, silicon-on-insulator, and combinations thereof.
34. The integrated circuit of claim 25 , wherein the first high-permittivity dielectric material is selected from a group consisting of metal oxides, metal nitrides, metal silicates, transition metal-oxides, transition metal-nitrides, transition metal-silicates, oxynitrides of metals, zirconium silicate, HfO 2 , ZrO 2 , ZrO x N y , HfO x N y , HfSi x O y , ZrSi x O y , HfSi x O y N z , ZrSi x O y N z , Al 2 O 3 , TiO 2 , Ta 2 O 5 , La 2 O 3 , CeO 2 , Bi 4 Si 2 O 12 , WO 3 , Y 2 O 3 , LaAlO 3 , Ba 1-x Sr x TiO 3 , PbTiO 3 , BaTiO 3 , SrTiO 3 , PbZrO 3 , PST, PZN, PZT, PMN, and combinations thereof.
35. The integrated circuit of claim 25 , wherein the second high-permittivity dielectric material is selected from a group consisting of metal oxides, metal nitrides, metal silicates, transition metal-oxides, transition metal-nitrides, transition metal-silicates, oxynitrides of metals, zirconium silicate, HfO 2 , ZrO 2 , ZrO x N y , HfO x N y , HfSi x O y , ZrSi x O y , HfSi x O y N z , ZrSi x O y N z , Al 2 O 3 , TiO 2 , Ta 2 O 5 , La 2 O 3 , CeO 2 , Bi 4 Si 2 O 12 , WO 3 , Y 2 O 3 , LaAlO 3 , Ba 1-x Sr x TiO 3 , PbTiO 3 , BaTiO 3 , SrTiO 3 , PbZrO 3 , PST, PZN, PZT, PMN, and combinations thereof.
36. The integrated circuit of claim 29 , wherein the normal-permittivity dielectric material is selected from a group consisting of silicon oxide, silicon oxynitride, silicon nitride, and combinations thereof.
37. The integrated circuit of claim 25 , wherein the first transistor is separated from the second transistor by an isolation structure selected from a group consisting of shallow trench isolation, localized oxidation of silicon (LOCOS), field oxide (FOX), silicon islands formed on a silicon-on-insulator (SOI) substrate, and combinations thereof.
38. An integrated circuit comprising:
a substrate;
a first transistor having a first gate dielectric portion located between a first gate electrode and the substrate, wherein the first gate dielectric portion comprises a first high-permittivity dielectric material, wherein the first gate dielectric portion has a first equivalent silicon oxide thickness; and
a second transistor having a second gate dielectric portion located between a second gate electrode and the substrate, wherein the second gate dielectric portion comprises a second high-permittivity dielectric material, wherein the second high-permittivity dielectric material is different than the first high-permittivity dielectric material, wherein the second gate dielectric portion has a second equivalent silicon oxide thickness, and wherein the second equivalent silicon oxide thickness is different than the first equivalent silicon oxide thickness.