IP Library › Granted Patent US 7,052,978
Granted Patent B2
US 7,052,978 · App. 10/649,958 · Granted May 30, 2006

Arrangements incorporating laser-induced cleaving

Assignee: Intel Corporation
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Quick Facts
Patent No.
US 7,052,978
App. No.
10/649,958
Granted
May 30, 2006
Kind
B2
Abstract

Arrangements incorporating laser-induced cleaving.

Claims (92)

1. A method comprising:

forming a cleave layer in a substrate, wherein the cleave layer comprises silicon-germanium (SiGe), and the substrate comprises silicon;

impinging laser energy on the substrate; and

effecting laser-induced cleaving along the cleave layer by performing at least one of:

stoichiometrically adjusting a Ge content in a SiGe material to form the cleave layer in the substrate to match a bond breaking energy involving the SiGe material to a laser energy characterized by a laser wavelength; and

selecting the laser wavelength to provide the laser energy to substantially match a bond-breaking threshold energy of the material, based upon at least a stoichiometric composition of the SiGe material of the cleave layer, wherein the laser wavelength is tuned to provide the laser energy to be greater than a band gap of SiGe and smaller than that of Si.

2. A method as claimed in claim 1 , wherein the laser energy induces selective bond breaking at an interface of a host material of the substrate and the material of the cleave layer, to effect the laser-induced cleaving of the substrate substantially along interface.

3. A system comprising:

at least one item selected from a list of: an electronic package, PCB, socket bus portion, input device, output device, power supply arrangement and case; and

at least one silicon-on-insulator semiconductor device manufactured through use of at least the method of claim 2 .

4. A method as claimed in claim 1 , comprising predetermined balancing of a stoichiometric composition of the material of the cleave layer versus a predetermined laser energy to effect a predetermined cleave yield.

5. A system comprising:

at least one item selected from a list of: an electronic package, PCB, socket bus portion, input device, output device, power supply arrangement and case; and

at least one silicon-on-insulator semiconductor device manufactured through use of at least the method of claim 4 .

6. A method as claimed in claim 1 , comprising:

bonding the substrate to a receiving substrate prior to the laser-induced cleaving, wherein upon the laser-induced cleaving, a layer cleaved from the substrate remains bonded to the receiving substrate.

7. A system comprising:

at least one item selected from a list of: an electronic package, PCB, socket bus portion, input device, output device, power supply arrangement and case; and

at least one silicon-on-insulator semiconductor device manufactured through use of at least the method of claim 6 .

8. A method as claimed in claim 1 , comprising:

impinging the laser energy on at least one side edge of the substrate in a side-cut mode in effecting the laser-induced cleaving.

9. A method as claimed in claim 8 , wherein the laser energy induces selective bond breaking at an interface of a host material of the substrate and the material, to effect the laser-induced cleaving of the substrate, substantially along the interface.

10. A system comprising:

at least one item selected from a list of: an electronic package, PCB, socket, bus portion, input device, output device, power supply arrangement and case; and

at least one silicon-on-insulator semiconductor device manufactured through use of at least the method of claim 9 .

11. A method as claimed in claim 8 , comprising predetermined balancing of a stoichiometric composition of the material versus a predetermined laser energy to effect a predetermined cleave yield.

12. A system comprising:

at least one item selected from a list of: an electronic package, PCB, socket bus portion, input device, output device, power supply arrangement and case; and

at least one silicon-on-insulator semiconductor device manufactured through use of at least the method of claim 11 .

13. A method as claimed in claim 8 , comprising:

forming micro-voids in the substrate prior to impinging the laser energy on the at least one side edge of the substrate in the side-cut mode, and effecting the laser-induced cleaving along cleave plane defined by ones of the micro-voids.

14. A method as claimed in claim 13 , wherein the substrate comprises silicon (Si), wherein the micro-voids are formed by implantation of at least one of hydrogen (H), H2 and helium (He) into the substrate, and subsequent annealing of the substrate.

15. A system comprising:

at least one item selected from a list of: an electronic package, PCB, socket bus portion, input device, output device, power supply arrangement and case; and

at least one silicon-on-insulator semiconductor device manufactured through use of at least the method of claim 14 .

16. A system comprising:

at least one item selected from a list of: an electronic package, PCB, socket bus portion, input device, output device, power supply arrangement and case; and

at least one silicon-on-insulator semiconductor device manufactured through use of at least the method of claim 13 .

17. A method as claimed in claim 8 , comprising:

bonding the substrate to a receiving substrate prior to the laser-induced cleaving, wherein upon the laser-induced cleaving, a layer cleaved from the substrate remains bonded to the receiving substrate.

18. A system comprising:

at least one item selected from a list of: an electronic package, PCB, socket bus portion, input device, output device, power supply arrangement and case; and

at least one silicon-on-insulator semiconductor device manufactured through use of at least the method of claim 17 .

19. A system comprising:

at least one item selected from a list of: an electronic package, PCB, socket bus portion, input device, output device, power supply arrangement and case; and

at least one silicon-on-insulator semiconductor device manufactured through use of at least the method of claim 8 .

20. A system comprising:

at least one item selected from a list of: an eledtronic package, PCB, socket, bus portion, input device, output device, power supply arrangement and case; and

at least one silicon-on-insulator semiconductor device manufactured through use of at least the method of claim 1 .

21. A method comprising:

simultaneously applying a plurality of interfering laser beams to a substrate induce cleaving of the substrate substantially along a laser-defined cleave plane; and

designing a profile of a laser energy interference pattern along a thickness of the substrate to determine a depth of a desired cleave plane relative to a surface of the substrate.

22. A method as claimed in claim 21 ,

wherein the plurality of interfering laser beams have at least one of specifically tuned energies, incidence angles, and space profiles, to define a desired cleave plane.

23. A system comprising:

at least one item selected from a list of: an electronic package, PCB, socket bus portion, input device, output device, power supply arrangement and case; and

at least one silicon-on-insulator semiconductor device manufactured through use of at least the method of claim 22 .

24. A method as claimed in claim 21 , comprising:

effecting a predetermined material within the substrate to form a predetermined cleave layer, within which the laser-induced cleaving is to be effected.

25. A system comprising:

at least one item selected from a list of: an electronic package, PCB, socket bus portion, input device, output device, power supply arrangement and case; and

at least one silicon-on-insulator semiconductor device manufactured through use of at least the method of claim 24 .

26. A method as claimed in claim 24 , wherein the substrate comprises silicon (Si), the predetermined material comprises germanium (Ge), and the laser energy is tuned to be greater than a band gap of SiGe but smaller than that of Si.

27. A system comprising:

at least one item selected from a list of: an electronic package, PCB, socket bus portion, input device, output device, power supply arrangement and case; and

at least one silicon-on-insulator semiconductor device manufactured through use of at least the method of claim 26 .

28. A method as claimed in claim 24 , wherein the substrate comprises silicon (Si), the predetermined material comprises hydrogen (H), and the laser energy is infrared laser energy.

29. A system comprising:

at least one item selected from a list of: an electronic package, PCB, socket bus portion, input device, output device, power supply arrangement and case; and

at least one silicon-on-insulator semiconductor device manufactured through use of at least the method of claim 28 .

30. A method as claimed in claim 24 , wherein the laser energy induces selective bond breaking at an interface of a host material of the substrate and the predetermined material, to effect the laser-induced cleaving of the substrate substantially along the interface.

31. A system comprising:

at least one item selected from a list of: an electronic package, PCB, socket bus portion, input device, output device, power supply arrangement and case; and

at least one silicon-on-insulator semiconductor device manufactured through use of at least the method of claim 30 .

32. A method as claimed in claim 24 , comprising at least one of:

stoichiometrically designing a composition of the material to substantially match a bond breaking energy involving the material, to the laser energy; and

selecting the laser wavelength to provide the laser energy to substantially match a bond-breaking threshold energy of the material, based upon at least a stoichiometric composition of the material.

33. A method as claimed in claim 32 , comprising predetermined balancing of a stoichimetric composition of the material of the cleave layer versus a predetermined laser energy to effect a predetermined cleave yield.

34. A system comprising:

at least one item selected from a list of: an electronic package, PCB, socket bus portion, input device, output device, power supply arrangement and case; and

at least one silicon-on-insulator semiconductor device manufactured through use of at least the method of claim 33 .

35. A system comprising:

at least one item selected from a list of: an electronic package, PCB, socket bus portion, input device, output device, power supply arrangement and case; and

at least one silicon-on-insulator semiconductor device manufactured through use of at least the method of claim 32 .

36. A method as claimed in claim 21 , comprising:

bonding the substrate to a receiving substrate prior to the laser-induced cleaving, wherein upon the laser-induced cleaving, a layer cleaved from the substrate remains bonded to the receiving substrate.

37. A system comprising:

at least one item selected from a list of: an electronic package, PCB, socket bus portion, input device, output device, power supply arrangement and case; and

at least one silicon-on-insulator semiconductor device manufactured through use of at least the method of claim 36 .

38. A system comprising:

at least one item selected from a list of: an electronic package, PCB, socket bus portion, input device, output device, power supply arrangement and case; and

at least one silicon-on-insulator semiconductor device manufactured through use of at least the method of claim 21 .

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Mar 5, 2004
From: SHAHEEN, MOHAMAD A.; LIU, MARK Y.; TAYLOR, MITCHELL C.
To: INTEL CORPORATION
Reel/Frame 015051/0684 →
Continuity (1)
Related Publication 20050048738A1 · Mar 3, 2005