IP Library › Granted Patent US 7,053,481
Granted Patent B2
US 7,053,481 · App. 10/703,318 · Granted May 30, 2006

High capacitance package substrate

Assignee: Intel Corporation
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Quick Facts
Patent No.
US 7,053,481
App. No.
10/703,318
Granted
May 30, 2006
Kind
B2
Abstract

A high capacitance substrate. The substrate includes a core tolerant to sintering thereon of a high k material to provide increased capacitance. The core may be non-ceramic. The material sintered thereon may have a dielectric constant in excess of about 4. The substrate may be a package substrate electrically coupled to a die.

Claims (20)

1. A substrate comprising:

a core having at least one high capacitance via and at least one high speed via therethrough, wherein the at least one high speed via comprises a low k dielectric material and the at least one high capacitance via comprises a high k dielectric material; and

a material sintered on the core to increase a capacitance thereof, the core having a tolerance to sintering of the material thereon.

2. The substrate of claim 1 wherein said material is one of barium titanate, barium strontium titanate and tantalum pentoxide.

3. The substrate of claim 1 wherein said core is of one of copper and a nickel iron alloy.

4. The substrate of claim 1 wherein the core is non-ceramic.

5. The substrate of claim 1 wherein said core includes a coefficient of thermal expansion tailored to substantially match a coefficient of thermal expansion of a silicon based material.

6. The substrate of claim 1 wherein the tolerance is to sintering by application of a temperature of up to about 1,083° C.

7. The substrate of claim 1 for one of a printed circuit board, a semiconductor package, and a die.

8. The substrate of claim 1 wherein said material forms a first layer on a first side of said core and a second layer on a second side of said core.

9. A substrate comprising:

a core having at least one via therethrough, wherein at least one of the at least one vias comprise a low k dielectric material;

a material sintered on the core to increase a capacitance thereof, the core having a tolerance to sintering of the material thereon, wherein said material is a first material comprising a high k dielectric material, and each via of said at least one via accommodating one of said first material and the low k dielectric material, wherein the low k dielectric material comprises a dielectric constant of less than about 4.

10. A system comprising:

a printed circuit board; and

a semiconductor package coupled to the printed circuit board and including a package substrate, with a die coupled thereto and a core with a material sintered thereon to provide a capacitance thereto, wherein the core is tolerant to a sintering temperature of up to about 1,427° C. and wherein the package substrate comprises at least one high capacitance via and at least one high speed via therethrough, wherein the high speed via comprises a low k dielectric material.

11. The system of claim 10 wherein the capacitance is a first capacitance, said package substrate having a second capacitance provided by the at least one high capacitance via.

12. A substrate comprising:

a core having at least one high capacitance via and at least one high speed via therethrough, wherein the at least one high speed via comprises a low k dielectric material;

a material sintered on the core to increase a capacitance thereof, the core having a tolerance to sintering of the material thereon, wherein the core is tolerant to a sintering temperature of up to about 1,427° C.

Continuity (2)
Division 1015898700 · May 30, 2002
Related Publication 20040095734A1 · May 20, 2004