Bonding method
View Patent ↗The present invention relates to a method to form an integrated device, said device comprising a first substrate and at least one element provided on a second substrate. A bonding material is arranged on at least one of said substrates. Said first and second substrates are joined together. At least one recess is provided through at least said first substrate and said material. Support structures are provided in at least a part of said at least one recess to mechanically and/or electrically interconnect said at least one element on said second substrate and said first substrate. At least one element out of said first substrate is formed to be mechanically and/or electrically connectable to said at least one support structure. At least a portion of said material between said first and second substrates is stripped away to make said element on said first substrate movable.
1. A method to form an integrated device, said device comprising a first substrate and at least one element provided on a second substrate, comprising the actions of:
arranging a layer of material on at least a portion of one of said substrates,
joining said first and second substrates together,
providing at least one recess through at least said first substrate and said material,
providing support structures in at least a part of said at least one recess to mechanically and/or electrically interconnect said at least one element on said second substrate and said first substrate,
forming at least one element out of said first substrate to be mechanically and/or electrically connectable to said at least one support structure
stripping away at least a portion of said material between said first and second substrates to make said element on said first substrate movable.
2. The method according to claim 1 , wherein said first and second substrates are joined together by means of at least one of the group of: bonding, riveting, bolted joint, external fixture, flip chip bonding, capillary wedge bonding, ultrasonic bonding.
3. The method according to claim 1 , further comprising the action of:
removing a portion of the thickness of the first substrate.
4. The method according to claim 1 , further comprising the action of:
arranging a metal layer on at least one surface of said first substrate prior to said joining.
5. The method according to claim 1 , further comprising the action of:
doping at least a portion of said first substrate made of semiconducting material prior to joining said first and second substrates together.
6. The method according to claim 1 , further comprising the action of:
providing at least one additional layer of stress compensating material on said first substrate.
7. The method according to claim 6 , wherein said stress compensating material is at least one of the materials of: silicon oxide, silicon nitride, metal.
8. The method according to claim 1 , wherein said support structure is made of electrically non conducting material.
9. The method according to claim 1 , wherein said support structure is made of electrically conducting material.
10. The method according to claim 1 , wherein said first substrate and said second substrate are secured to each other by one of the group of: evaporation, spin coating, sputtering, plating, riveting, soldering, gluing, Chemical Vapor Deposition, epitaxial growth, capillary flow.
11. The method according to claim 1 , wherein said material is a low temperature adhesive, e.g. a polymer selected from poly-imide, bensocyclobutene (BCB), epoxy, photoresist.
12. The method according to claim 1 , wherein said material is a metal, semiconducting or dielectric material.
13. The method according to claim 1 , wherein said at least one element formed out of said first substrate is a micro mirror.
14. The method according to claim 1 , wherein said at least one element formed out of said first substrate is made of a single crystal material.
15. The method according to claim 1 , wherein said at least one element formed out of said first substrate is made of amorphous material.
16. The method according to claim 1 , wherein said at least one element formed out of said first substrate is made of nanocrystalline material.
17. The method according to claim 14 , wherein said material is semiconducting.
18. The method according to claim 1 , wherein said at least one element provided on said second substrate is an integrated circuit.
19. The method according to claim 1 , wherein said integrated device is a Spatial Light Modulator (SLM).
20. The method according to claim 19 , wherein said Spatial Light Modulator is a micromirror SLM.
21. The method according to claim 1 , wherein said support structure is hollow with an open end.
22. The method according to claim 1 , wherein said first substrate is at least partly prefabricated prior to joining said first and second substrates.
23. The method according to claim 15 , wherein said material is semiconducting.
24. The method according to claim 16 , wherein said material is semiconducting.