IP Library › Granted Patent US 7,071,576
Granted Patent B2
US 7,071,576 · App. 10/846,672 · Granted Jul 4, 2006

Semiconductor device and method of manufacturing the same

Assignee: Kabushiki Kaisha Toshiba
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Quick Facts
Patent No.
US 7,071,576
App. No.
10/846,672
Granted
Jul 4, 2006
Kind
B2
Abstract

A semiconductor device includes a semiconductor substrate, a first wiring arranged on the semiconductor substrate, a first electrode pad electrically connected to the first wiring, and a porous organic resin film covering the front surface of the semiconductor substrate such that the first electrode pad is exposed to the outside.

Claims (40)

1. A semiconductor device comprising:

a semiconductor element having a front surface on which an electrode pad is provided, the front surface being covered with a porous organic resin film;

an electrode electrically connected to the electrode pad;

a package substrate having a mounting surface to which the semiconductor element is mounted such that the front surface of the semiconductor element is mounted to the package substrate;

a package wiring arranged within the package substrate and electrically connected to the electrode; and

a sealing section sealing a clearance between the organic resin film and the package substrate.

2. The semiconductor device according to claim 1 , wherein the organic resin film has a porosity of 40% to 70%.

3. The semiconductor device according to claim 1 , wherein: the package substrate is formed of an organic resin material; and

the organic resin film has a porosity higher than that of the package substrate.

4. The semiconductor device according to claim 1 , wherein:

the sealing section is formed of an organic resin material; and

the organic resin film has a porosity higher than that of the sealing section.

5. The semiconductor device according to claim 1 , wherein the semiconductor element includes an interlayer insulating film made of an insulating material having a mechanical strength lower than that of SiO 2 and formed between a semiconductor substrate of the semiconductor element and the organic resin film.

6. The semiconductor device according to claim 1 , wherein the semiconductor element includes an interlayer insulating film having a dielectric constant lower than 3 and formed between a semiconductor substrate of the semiconductor element and the organic resin film.

7. The semiconductor device according to claim 6 , wherein the interlayer insulating film is porous.

8. A semiconductor device comprising:

a semiconductor element having a front surface on which an electrode pad is provided, the front surface being covered with a porous organic resin film;

a package substrate having a mounting surface to which the semiconductor element is mounted such that a back surface opposite to the front surface of the semiconductor element is mounted to the package substrate; and

a molding resin layer arranged on the package substrate so as to cover the semiconductor element,

wherein the semiconductor element includes an interlayer insulating film having a dielectric constant lower than 3 and formed between a semiconductor substrate of the semiconductor element and the organic resin film.

9. The semiconductor device according to claim 8 , wherein the organic resin film has a porosity of 40% to 70%.

10. The semiconductor device according to claim 8 , wherein the organic resin film has a porosity higher than that of the molding resin layer.

11. The semiconductor device according to claim 8 , wherein the interlayer insulating film consists of an insulating material having a mechanical strength lower than that of SiO 2 .

12. A semiconductor device comprising:

a semiconductor substrate which has terminals;

a package which is provided on the substrate and which has a semiconductor element and electrode pads electrically connected to the terminals; and

an organic resin film which is porous and which fills a gap between the substrate and the package.

13. The semiconductor device according to claim 12 , wherein the organic resin film has a porosity of 40 to 70%.

14. A semiconductor device comprising:

a semiconductor element;

a first wiring arranged on a front surface of the semiconductor element;

a porous organic resin film covering the front surface of the semiconductor element;

a second wiring arranged within the organic resin film and electrically connected to the first wiring; and

an electrode arranged on the organic resin film and electrically connected to the second wiring.

15. The semiconductor device according to claim 14 , wherein the organic resin film has a porosity of 40% to 70%.

16. The semiconductor device according to claim 14 , further comprising an electrode pad arranged between the organic resin film and the electrode, and electrically connecting the second wiring to the electrode.

17. The semiconductor device according to claim 14 , wherein the second wiring is a conductive plug which electrically connects the first wiring to the electrode.

18. The semiconductor device according to claim 14 , wherein the semiconductor element includes an interlayer insulating film made of an insulating material having a mechanical strength lower than that of SiO 2 and formed between a semiconductor substrate of the semiconductor element and the organic resin film.

19. The semiconductor device according to claim 14 , wherein the semiconductor element includes an interlayer insulating film having a dielectric constant lower than 3 and formed between a semiconductor substrate of the semiconductor element and the organic resin film.

20. The semiconductor device according to claim 8 , further comprising a package wiring arranged within the package substrate, and a bonding wire electrically connecting the electrode pad to the package wiring.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Sep 15, 2004
From: NAKAYOSHI, HIDEO; TAKUBO, CHIAKI
To: KABUSHIKI KAISHA TOSHIBA
Reel/Frame 015784/0963 →
Priority Claims (1)
JP 2003-188503 · Jun 30, 2003 · national
Continuity (1)
Related Publication 20050006766A1 · Jan 13, 2005