Corrosion-resistant copper bond pad and integrated device
The invention provides an integrated device with corrosion-resistant capped copper bond pads. The capped copper bond pads include at least one copper bond pad on a semiconductor substrate. An activation layer comprising one of immersion palladium, electroless cobalt, or immersion ruthernium is disposed on the copper bond pad. A first intermediate layer of electroless nickel-boron alloy is disposed on the activation layer. A second intermediate layer comprising one of electroless nickel or electroless palladium is disposed on the first intermediate layer, and an immersion gold layer is disposed on the second intermediate layer. A capped copper bond pad and a method of forming the capped copper bond pads are also disclosed.
1. An integrated device with a corrosion-resistant capped copper bond pad, comprising:
at least one copper bond pad on a semiconductor substrate;
an activation layer comprising one of immersion palladium, electroless cobalt, or immersion ruthenium disposed on the copper bond pad;
a first intermediate layer of electroless nickel-boron alloy disposed on the activation layer;
a second intermediate layer comprising one of electroless nickel or electroless palladium disposed on the first intermediate layer;
an immersion gold layer disposed on the second intermediate layer; and
an electroless gold layer disposed on the immersion gold, wherein the electroless gold layer has a thickness between 0.1 microns and 1.5 microns.
2. The integrated device of claim 1 wherein the integrated device is selected from the group consisting of an integrated circuit, an analog circuit, a digital circuit, a radio-frequency device, a semiconductor sensor, an integrated sensor, a pressure sensor, a microelectromechanical device, a microoptoelectromechanical device, a sensor assembly, an integrated circuit assembly, a wire-bonded assembly, and a combination thereof.
3. The integrated device of claim 1 wherein the semiconductor substrate comprises one of a silicon wafer or a silicon die.
4. The integrated device of claim 1 wherein the first intermediate layer of electroless nickel-boron alloy has a thickness between 0.1 microns and 0.5 microns.
5. The integrated device claim 1 wherein the first intermediate layer of electroless nickel-boron alloy has a boron concentration between 0.1 percent and 5.0 percent by weight.
6. The integrated device of claim 1 wherein the second intermediate layer of electroless nickel has a thickness between 0.5 microns and 7.5 microns.
7. The integrated device of claim 1 wherein the second intermediate layer of electroless nickel comprises boron alloyed with the electroless nickel, the boron having a concentration between 0.1 percent and 5.0 percent by weight.
8. The integrated device of claim 1 wherein the second intermediate layer of electroless nickel comprises phosphorus alloyed with the electroless nickel, the phosphorus having a concentration between 10.0 percent and 25.0 percent by weight.
9. The integrated device of claim 1 wherein the second intermediate layer of electroless palladium has a thickness between 0.25 microns and 3.0 microns.
10. The integrated device of claim 1 wherein the immersion gold layer has a thickness between 0.05 microns and 0.25 microns.
11. A method of forming a corrosion-resistant capped copper bond pad, comprising:
providing a plurality of copper bond pads on a semiconductor substrate;
plating an activation layer with one of immersion palladium, electroless cobalt, or immersion ruthenium on the copper bond pads;
plating a first intermediate layer with electroless nickel-boron alloy on the activation layer;
plating a second intermediate layer with one of electroless nickel or electroless palladium on the first intermediate layer;
plating an immersion gold layer on the second intermediate layer; and
plating an electroless gold layer on the immersion gold, wherein the electroless gold layer has a thickness between 0.1 microns and 1.5 microns.
12. The method of claim 11 wherein the provided semiconductor substrate comprises one of a silicon wafer or a silicon die.
13. The method of claim 11 wherein the first intermediate layer of electroless nickel-boron alloy is plated to a thickness between 0.1 microns and 0.5 microns.
14. The method of claim 11 wherein the first intermediate layer of electroless nickel-boron alloy is plated with a boron concentration between 0.1 percent and 5.0 percent by weight.
15. The method of claim 11 wherein the second intermediate layer of electroless nickel is plated to a thickness between 0.5 microns and 7.5 microns.
16. The method of claim 11 wherein the plated second intermediate layer of electroless nickel comprises boron alloyed with the electroless nickel, the boron having a concentration between 0.1 percent and 5.0 percent by weight.
17. The method of claim 11 wherein the plated second intermediate layer of electroless nickel comprises phosphorus alloyed with the electroless nickel, the phosphorus having a concentration between 10.0 percent and 25.0 percent by weight.
18. The method of claim 11 wherein the second intermediate layer of electroless palladium is plated to a thickness between 0.25 microns and 3.0 microns.
19. The method of claim 11 wherein the immersion gold layer is plated to a thickness between 0.05 microns and 0.25 microns.
20. A semiconductor wafer with a plurality of corrosion-resistant capped copper bond pads, comprising:
a plurality of copper bond pads on a surface of the semiconductor wafer;
an activation layer comprising one of immersion palladium, electroless cobalt, or immersion ruthenium disposed on the copper bond pads;
a first intermediate layer of electroless nickel-boron alloy disposed on the activation layer;
a second intermediate layer comprising one of electroless nickel or electroless palladium disposed on the first intermediate layer;
an immersion gold layer disposed on the second intermediate layer; and
an electroless gold layer disposed on the immersion gold, wherein the electroless gold layer has a thickness between 0.1 microns and 1.5 microns.
21. The semiconductor wafer of claim 20 , wherein the semiconductor wafer comprises a silicon substrate.
22. The semiconductor wafer of claim 20 , wherein the semiconductor wafer comprises an integrated device selected from the group consisting of an integrated circuit, an analog circuit, a digital circuit, a radio-frequency device, a semiconductor sensor, an integrated sensor, a pressure sensor, a microelectromechanical device, a microoptoelectromechanical device, a wire-bondable device, and a combination thereof.
23. The semiconductor wafer of claim 20 wherein the second intermediate layer of electroless nickel comprises boron alloyed with the electroless nickel, the boron having a concentration between 0.1 percent and 5.0 percent by weight.
24. The semiconductor wafer of claim 20 wherein the second intermediate layer of electroless nickel comprises phosphorus alloyed with the electroless nickel, the phosphorus having a concentration between 10.0 percent and 25.0 percent by weight.
25. A capped copper bond pad for a corrosion-resistant integrated device, comprising:
an activation layer comprising one of immersion palladium, electroless cobalt, or immersion ruthenium disposed on at least one copper bond pad;
a first intermediate layer of electroless nickel-boron alloy disposed on the activation layer;
a second intermediate layer comprising one of electroless nickel or electroless palladium disposed on the first intermediate layer;
an immersion gold layer disposed on the second intermediate layer; and
an electroless gold layer disposed on the immersion gold, wherein the electroless gold layer has a thickness between 0.1 microns and 1.5 microns.
26. The capped copper bond pad of claim 25 wherein the second intermediate layer of electroless nickel comprises boron alloyed with the electroless nickel, the boron having a concentration between 0.1 percent and 5.0 percent by weight.
27. The capped copper bond pad of claim 25 wherein the second intermediate layer of electroless nickel comprises phosphorus alloyed with the electroless nickel, the phosphorus having a concentration between 10.0 percent and 25.0 percent by weight.