IP Library Granted Patent US 7,098,047
Granted Patent B2
US 7,098,047 · App. 10/718,102 · Granted Aug 29, 2006

Wafer reuse techniques

Assignee: Intel Corporation
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Quick Facts
Patent No.
US 7,098,047
App. No.
10/718,102
Granted
Aug 29, 2006
Kind
B2
Abstract

Briefly, test wafer reuse techniques.

Claims (26)

1. A method comprising:

providing a first coating over a wafer;

testing a semiconductor tool using the coated wafer with the first coating; and

replacing at least a portion of the first coating over the wafer with a layer of a second coating, wherein each of the first coating and the second coating comprises at least one characteristic of a single crystal structure.

2. The method of claim 1 , further comprising testing surface contaminant adding properties of the semiconductor tool.

3. The method of claim 2 , wherein the testing surface contaminant adding properties comprises testing light scattering properties of a surface of the first coating over the wafer.

4. The method of claim 1 , wherein the at least one characteristic of the single crystal structure comprises insignificant distortion of an angle of refraction of incident light.

5. The method of claim 1 , wherein the providing the first coating comprises:

providing a polysilicon layer over the wafer; and

surface polishing the polysilicon layer.

6. The method of claim 1 , wherein the replacing comprises:

mechanically grinding a portion of the first coating;

providing a polysilicon layer over a portion of the wafer where the first coating was removed by grinding; and

surface polishing the polysilicon layer.

7. The method of claim 1 , further comprising removing contaminants from a surface of the first coating over the wafer used to test the semiconductor tool.

8. A method comprising:

replacing at least a portion of a first coating of a wafer with a layer of a second coating, wherein each of the first coating and the second coating has at least one characteristic of a single crystal structure; and

testing at least one characteristic of a semiconductor tool using the coated wafer with the second coating.

9. The method of claim 8 , wherein the replacing comprises:

mechanically grinding the first coating of the wafer;

providing a polysilicon layer over a portion of the waFer where the first coating was removed by grinding; and

surface polishing the polysilicon layer.

10. The method of claim 9 , wherein the replacing further comprises removing contaminants from a surface of the first coating of the wafer.

11. The method of claim 8 , further comprising testing surface contaminant adding properties of the semiconductor tool.

12. The method of claim 11 , wherein the testing surface contaminant adding properties comprises testing light scattering properties of a surface of the second coating of the wafer.

13. The method of claim 8 , wherein the at least one characteristic of the single crystal structure comprises insignificant distortion of an angle of refraction of incident light.

Assignments (2)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 14, 2014
From: INTEL CORPORATION
To: SONY CORPORATION OF AMERICA
Reel/Frame 032893/0199 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Nov 19, 2003
From: RAVI, KRAMADHATI V.
To: INTEL CORPORATION
Reel/Frame 014739/0368 →
Continuity (1)
Related Publication 20050106881A1 · May 19, 2005