IP Library Granted Patent US 7,127,649
Granted Patent B2
US 7,127,649 · App. 10/457,294 · Granted Oct 24, 2006

Smartcard test system and related methods

Assignee: STMicroelectronics, Inc.
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Quick Facts
Patent No.
US 7,127,649
App. No.
10/457,294
Granted
Oct 24, 2006
Kind
B2
Abstract

A system of the present invention tests the design of a universal serial bus (USB) smartcard device and includes a bus analyzer for running test cases to generate USB bus traffic. A processor is operatively connected to the bus analyzer for receiving and transforming data about USB traffic into a selected data format that is usable across different smartcard development environments.

Claims (55)

1. A system for testing the design of a Universal Serial Bus (USB) smartcard device comprising:

a bus analyzer for running test cases to generate USB bus traffic; and

a processor operatively connected to the bus analyzer for receiving and transforming data about USB traffic into a selected data format usable across different smartcard development environments.

2. The system according to claim 1 , wherein said processor is operative for developing test cases for USB traffic patterns.

3. The system according to claim 1 , wherein said processor is operative for recording USB traffic activity as USB traffic files that include details of USB bus traffic.

4. The system according to claim 1 , and further comprising a test socket operatively connected to said bus analyzer for receiving a silicon chip of a smartcard to be tested.

5. The system according to claim 1 , and further comprising a smartcard reader operatively connected to said bus analyzer for receiving a smartcard device that will be tested.

6. The system according to claim 1 , and further comprising a smartcard device emulator operatively connected to said bus analyzer for emulating a smartcard device.

7. The system according to claim 1 , wherein said processor comprises a computer having a graphical user interface through which the bus analyzer can be controlled.

8. The system according to claim 1 , wherein said processor is operative for generating text-only USB traffic generation (UTG) files that describe USB traffic to be generated.

9. The system according to claim 1 , wherein said processor is operative for transforming the USB traffic files into received data files that reflect at least one of the data received about generated traffic on the USB bus and expected data files about expected data results.

10. The system according to claim 9 , and wherein said processor is operative for comparing data in received data files with data in expected data files.

11. The system according to claim 9 , wherein said received data files and expected data files are text-only data files.

12. A system for testing the design of a Universal Serial Bus (USB) smartcard device design comprising:

a test case generator that generates test cases for USB traffic patterns of a smartcard emulator or device-under-test;

a bus analyzer for running the test cases and generating USB bus traffic; and

a processor operatively connected to the bus analyzer for receiving and transforming data about USB traffic into a selected data format usable across different smartcard development environments.

13. The system according to claim 12 , and further comprising a recording circuit for recording USB traffic activity as USB traffic files.

14. The system A system according to claim 13 , wherein said processor is operative for transforming the USB traffic files into a selected data format.

15. The system A system according to claim 12 , wherein said processor is operative for recording USB traffic activity as USB traffic files that include details of USB bus traffic.

16. The system according to claim 12 , and further comprising a test socket operatively connected to said bus analyzer for receiving a silicon chip of a smartcard device under test.

17. The system according to claim 12 , and further comprising a smartcard reader operatively connected to said bus analyzer for receiving a smartcard device that will be tested.

18. The system according to claim 12 , and further comprising a smartcard device emulator operatively connected to said bus analyzer for emulating a smartcard device.

19. The system according to claim 12 , wherein said processor comprises a computer having a graphical user interface through which the bus analyzer can be controlled.

20. The system according to claim 12 , wherein said processor is operative for generating text-only USB traffic generation (UTG) files that describe USB traffic to be generated.

21. The system according to claim 12 , wherein said processor is operative for transforming the USB traffic files into received data files that reflect at least one of the data received about generated traffic on the USB bus and expected data files about expected data results.

22. The system according to claim 21 , and wherein said processor is operative for comparing data in received data files with data in expected data files.

23. The system according to claim 21 , wherein said received data files and expected data files are text-only data files.

24. A method of testing the design of a Universal Serial Bus (USB) smartcard device comprising the steps of:

developing test cases for USB traffic patterns of a smartcard emulator or device-under-test;

running the test cases to generate USB bus traffic;

recording USB traffic activity as USB traffic files; and

transforming the USB traffic files into a selected data format usable across different smartcard development environments.

25. The method according to claim 24 , wherein the step of developing test cases further comprises the step of generating specified USB traffic scenarios for a host and device.

26. The method according to claim 24 , and further comprising the step of developing test cases to be run as text-only USB traffic generation (UTG) files that describe USB traffic to be generated.

27. The method according to claim 24 , and further comprising the step of generating the specified USB traffic scenarios within a USB bus analyzer operatively connected to an a smartcard emulator or device-under-test.

28. The method according to claim 24 , and further comprising the step of running the test cases against a smartcard device as a silicon chip.

29. The method according to claim 24 , and further comprising the step of running successive iterations of test cases and comparing results of the test cases to each other.

30. The method according to claim 24 , and further comprising the step of transforming the USB traffic files into received data files that reflect at least one of the data received about generated traffic on the USB bus and expected data files about expected data results.

31. The method according to claim 30 , and further comprising the step of comparing data in received data files with data in expected data files.

32. The method A method according to claim 30 , wherein the received data files and expected data files are text-only data files.

33. A method of testing the design of a Universal Serial Bus (USB) smartcard device design comprising the steps of:

generating USB traffic scenarios as test cases for a smartcard emulator or device under test;

deriving expected results from the traffic scenarios;

running the test cases; and

comparing actual results of the test cases to any expected results for facilitating software and hardware development of the smartcard device.

34. The method according to claim 33 , and further comprising the step of recording host and device responses when running the test cases.

35. The method according to claim 33 , wherein the step of developing test cases further comprises the step of generating specified USB traffic scenarios for a host and device.

36. The method according to claim 33 , and further comprising the step of developing test cases to be run as text-only USB traffic generation files that describe USB traffic to be generated.

37. The method according to claim 33 , and further comprising the step of generating the specified USB traffic scenarios within a USB bus analyzer operatively connected to an a smartcard emulator or device under test.

38. The method according to claim 33 , and further comprising the step of running the test cases against a smartcard device as a silicon chip.

39. The method according to claim 33 , and further comprising the step of running successive iterations of test cases and comparing results of the test cases to each other.

40. The method according to claim 33 , and further comprising the step of transforming the USB traffic files into received data files that reflect at least one of the data received about generated traffic on the USB bus and expected data files about expected data results.

41. The method according to claim 40 , and further comprising the step of comparing data in received data files with data in expected data files.

42. The method according to claim 40 , wherein the received data files and expected data files are text-only data files.

Assignments (3)
CORRECTIVE ASSIGNMENT TO CORRECT THE BRIEF FROM ASSIGNMENT TO ASSIGNMENT OF EQUAL AND UNDIVIDED ONE-HALF INTEREST, PREVIOUSLY RECORDED ON REEL 017025 FRAME 0276. Recorded Jan 23, 2006
From: STMICROELECTRONICS, INC.
To: AXALTO
Reel/Frame 017207/0278 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Nov 16, 2005
From: STMICROELECTRONICS, INC.
To: AXALTO
Reel/Frame 017025/0276 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jun 9, 2003
From: LEAMING, TAYLOR J.
To: STMICROELECTRONICS, INC.
Reel/Frame 014157/0947 →
Continuity (1)
Related Publication 20040250191A1 · Dec 9, 2004