IP Library › Granted Patent US 7,129,164
Granted Patent B2
US 7,129,164 · App. 10/968,199 · Granted Oct 31, 2006

Method for forming a multi-layer low-K dual damascene

Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
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Quick Facts
Patent No.
US 7,129,164
App. No.
10/968,199
Granted
Oct 31, 2006
Kind
B2
Abstract

A damascene structure and method for forming the same in a multi-density dielectric insulating layer the method including providing a substrate; forming at least a first layer comprising silicon oxide according to a first process having a first density; forming at least a second layer comprising silicon oxide according to a second process over the first layer having a second density less than the first density; etching a damascene opening through a thickness portion of the at least a first and the at least a second layer; and, filling the damascene opening to form a metal filled damascene.

Claims (56)

1. A method for forming a multi-density dielectric insulating layer for forming a metal filled damascene feature therein comprising the steps of:

providing a substrate;

forming at least a first layer comprising silicon oxide according to a first process having a first density;

forming at least a second layer comprising silicon oxide according to a second process over the first layer having a second density less than the first density;

wherein the first layer is formed having a density between about 1.5 and 2.2 gms/cm 2 and the second layer is formed having a density of less than about 2.2 gms/cm 2 ;

etching a damascene opening through a thickness portion of the at least a first and the at least a second layer; and,

filling the damascene opening to form a metal filled damascene.

2. The method of claim 1 , wherein the damascene opening comprises a via portion and an overlying trench line portion.

3. The method of claim 2 , wherein the via portion comprises the at least a first layer and the trench line portion comprises the at least a second layer.

4. The method of claim 1 , wherein the at least a first and the at least a second layer are formed by a process selected from the group consisting of spin-on, CVD, and PECVD.

5. The method of claim 1 , wherein the first and second silicon oxide forming precursors are selected from the group consisting of silsesquioxanes, organo-silanes, and organo-siloxanes.

6. The method of claim 1 , wherein the first and second processes comprise a PECVD process comprising an oxygen containing source gas and a precursor source gas comprising precursors selected from the group consisting of organo-silanes and organo-siloxanes.

7. The method of claim 6 , wherein the oxygen containing source gas is selected from the group consisting of O 2 , O 3 , N 2 O, and NO.

8. The method of claim 6 , wherein the precursor source gas is selected from the group consisting of methylsilanes and methylcyclotetrasiloxanes.

9. The method of claim 6 , wherein the at least a first layer is formed comprising a first relatively lower volumetric gas ratio of precursor source gas to the oxygen containing source gas compared to a respective second volumetric gas ratio for forming the least a second layer.

10. The method of claim 9 , wherein the first relatively lower volumetric gas ratio is lower by about a factor of about ½ to about ¼.

11. The method of claim 1 , wherein a curing process selected from the group consisting of a thermal treatment and a hydrogen containing plasma treatment is carried out following the respective depositions of the at least a first and the at least a second layer.

12. The method of claim 1 , wherein the curing process for the at least a first layer consists essentially of a thermal treatment.

13. The method of claim 1 , wherein the curing process for the at least a second layer consists essentially of a hydrogen containing plasma treatment.

14. A method for forming a metal filled damascene structure within a dual-density dielectric insulating layer comprising the steps of:

providing a semiconductor process wafer comprising a process surface;

forming a first layer comprising silicon oxide over the process surface according to a first process selected from the group consisting of spin-on and CVD;

carrying out a first curing process selected from the group consisting of a thermal treatment and a hydrogen containing plasma treatment to form a first layer having a first density;

forming a second layer over the first layer comprising silicon oxide according to a second process selected from the group consisting of spin-on and CVD;

carrying out a second curing process selected from the group consisting of a thermal treatment and a hydrogen containing plasma treatment to form a second layer having a second density less than the first density wherein the first layer is formed having a density between about 1.5 and 2.2 gms/cm 2 and the second layer is formed having a density of less than about 2.2 gms/cm 2 ; and,

forming a damascene opening extending through a thickness portion of the first and second layers.

15. The method of claim 14 , wherein the spin-on process comprises silicon oxide forming precursors selected from the group consisting of silsesquioxanes, organo-silanes, and organo-siloxanes.

16. The method of claim 14 , wherein the CVD process comprises a PECVD process comprising an oxygen containing source gas and a precursor source gas selected from the group consisting of organo-silanes and organo-siloxanes.

17. The method of claim 16 , wherein the oxygen containing source gas is selected from the group consisting of O 2 , O 3 , N 2 O, and NO.

18. The method of claim 16 , wherein the precursor source gas is selected from the group consisting of methylsilanes and methylcyclotetrasiloxanes.

19. The method of claim 16 , wherein the first layer is formed comprising a first relatively lower volumetric gas ratio of precursor source gas to the oxygen containing source gas compared to a respective second volumetric gas ratio for forming the second layer.

20. The method of claim 19 , wherein the first relatively lower volumetric gas ratio is lower by about a factor of about ½ to about ¼.

21. The method of claim 14 , wherein the first curing process consists essentially of a thermal treatment.

22. The method of claim 14 , wherein the second curing process consists essentially of a hydrogen containing plasma treatment.

23. The method of claim 14 , wherein the damascene opening is a dual damascene opening comprising a via portion formed substantially within the first layer and a trench line portion formed substantially within the second layer.

24. The method of claim 14 , further comprising the steps of:

blanket depositing a barrier layer over the damascene opening; and,

blanket depositing over the barrier layer a metal layer selected from the group consisting of aluminum, tungsten, and copper.

25. The method of claim 24 , wherein the step of blanket depositing comprises a copper electro-chemical deposition process comprising first blanket depositing a continuous copper seed layer.

26. The method of claim 1 , wherein the first and second layers are formed by a respective first and second PECVD process where the first PECVD process comprises a relatively higher proportion of oxygen containing gas relative to a silicon containing precursor gas compared to the second PECVD process.

27. The method of claim 26 , wherein said silicon containing precursor gas is selected from the group consisting of organo-silanes and organo-siloxanes.

28. The method of claim 16 , wherein the first and second layers are formed by a respective first and second PECVD process wherein the first PECVD process comprises a relatively higher proportion of oxygen relative to a precursor gas compared to the second PECVD process.

29. The method of claim 28 , wherein said silicon containing precursor gas is selected from the group consisting of organo-silanes and organo-siloxanes.

30. A method for forming a multi-density dielectric insulating layer for forming a metal filled damascene feature therein comprising the steps of:

providing a substrate;

forming at least a first layer comprising silicon oxide according;

carrying out a first curing process selected from the group consisting of a thermal treatment and a hydrogen containing plasma treatment to form said at least a first layer having a first density;

forming at least a second layer comprising silicon oxide according to a second process over the first layer;

carrying out a second curing process selected from the group consisting of a thermal treatment and a hydrogen containing plasma treatment to form said at least a second layer having a second density less than the first density wherein the first layer is formed having a density between about 1.5 and 2.2 gms/cm 2 and the second layer is formed having a density of less than about 2.2 gms/cm 2 ;

etching a dual damascene opening comprising a via portion and trench line portion through a thickness portion of the at least a first and the at least a second layer wherein the via portion comprises the at least a first layer and the trench line portion comprises the at least a second layer; and,

filling the dual damascene opening with metal to form a metal filled dual damascene.

31. The method of claim 30 , wherein the first and second process are selected from the group consisting of spin-on, CVD, and PECVD.

32. The method of claim 30 , wherein the first and second layers are formed by a respective first and second PECVD process where the first PECVD process comprises a relatively higher proportion of oxygen containing gas relative to a silicon containing precursor gas compared to the second PECVD process.

33. The method of claim 32 , wherein said silicon containing precursor gas is selected from the group consisting of organo-silanes and organo-siloxanes.

34. The method of claim 32 , wherein the silicon containing precursor gas is selected from the group consisting of methylsilanes and methylcyclotetrasiloxanes.

35. The method of claim 30 , wherein the first curing process consists essentially of a thermal process and the second curing process consists essentially of a hydrogen containing plasma treatment.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Oct 18, 2004
From: CHANG, HUI LIN; LU, YUNG CHENG; LI, LI PING; BAO, TIEN I; LIN, CHIH HSIEN
To: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
Reel/Frame 015923/0572 →
Continuity (1)
Related Publication 20060084279A1 · Apr 20, 2006