IP Library › Granted Patent US 7,138,330
Granted Patent B2
US 7,138,330 · App. 10/671,996 · Granted Nov 21, 2006

High reliability multilayer circuit substrates and methods for their formation

Assignee: Medtronic Minimed, Inc.
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Quick Facts
Patent No.
US 7,138,330
App. No.
10/671,996
Granted
Nov 21, 2006
Kind
B2
Abstract

A multilayer circuit substrate for multi-chip modules or hybrid circuits includes a dielectric base substrate, conductors formed on the base substrate and a vacuum deposited dielectric thin film formed over the conductors and the base substrate. The vacuum deposited dielectric thin film is patterned using sacrificial structures formed by shadow mask techniques. Substrates formed in this manner enable significant increases in interconnect density and significant reduction of over-all substrate thickness.

Claims (60)

1. A method for forming a multilayer circuit substrate, comprising:

providing a dielectric base substrate;

forming conductors on the base substrate;

forming sacrificial structures on the base substrate and conductors to define areas to be protected from deposition of a dielectric layer;

vacuum depositing a dielectric thin film on the base substrate, the conductors and the sacrificial structures; and

removing the sacrificial structures to leave a patterned deposited dielectric thin film on the conductors and the base substrate;

wherein the sacrificial structures are formed by a shadow mask deposition process; and

wherein the shadow mask deposition process utilizes a shadow mask having laser drilled via holes.

2. The method claimed in claim 1 , wherein forming the conductors comprises:

depositing a blanket layer of a conductor material; and

patterning the blanket layer of conductor material.

3. The method claimed in claim 2 , wherein the blanket layer of conductor material is formed by physical vapor deposition.

4. The method claimed in claim 2 , wherein the blanket layer of conductor material is formed by evaporation.

5. The method claimed in claim 2 , wherein the blanket layer of conductor material is formed by chemical vapor deposition.

6. The method claimed in claim 2 , wherein the blanket layer of conductor material is patterned by a photoresist lift-off process.

7. The method claimed in claim 2 , wherein the blanket layer of conductor material is patterned by a chemical etching process.

8. The method claimed in claim 1 , wherein the conductors are formed by a shadow mask patterning process.

9. The method claimed in claim 1 , wherein the conductors are formed by a screen printing process.

10. The method claimed in claim 1 , wherein the sacrificial structures are formed of aluminum and are removed using a ferric chloride solution.

11. The method claimed in claim 1 , further comprising mounting a circuit component on the deposited dielectric layer.

12. A method for forming a multilaver circuit substrate, comprising:

providing a dielectric base substrate;

forming conductors on the base substrate;

forming sacrificial structures on the base substrate and conductors to define areas to be protected from deposition of a dielectric layer;

vacuum depositing a dielectric thin film on the base substrate, the conductors and the sacrificial structures; and

removing the sacrificial structures to leave a patterned deposited dielectric thin film on the conductors and the base substrate;

wherein the base substrate comprises a hermetic via, and

wherein one of the conductors is formed in contact the hermetic via.

13. A method for forming a multilayer circuit substrate, comprising:

providing a dielectric base substrate;

forming conductors on the base substrate;

forming sacrificial structures on the base substrate and conductors to define areas to be protected from deposition of a dielectric layer;

vacuum depositing a dielectric thin film on the base substrate, the conductors and the sacrificial structures; and

removing the sacrificial structures to leave a patterned deposited dielectric thin film on the conductors and the base substrate;

wherein the base substrate comprises a hermetic via, and wherein providing the base substrate comprises:

forming a via hole in the base substrate;

respectively forming multiple layers of conductive ink on sidewalls of the via hole;

filling a space between said sidewalls with conductive ink; and

sintering the conductive material in the via hole.

14. The method claimed in claim 13 , wherein forming said multiple layers comprises:

introducing a conductive ink to the via hole;

applying a vacuum to the via hole to form a layer of said conductive ink on sidewalls of the hole; and

repeating said introducing and said applying to form said multiple layers of conductive ink on the sidewalls.

15. The method claimed in claim 14 , wherein the conductive ink is introduced to the via hole by screen printing.

16. The method claimed in claim 14 , wherein applying the vacuum eliminates voids in the conductive ink introduced into the via hole.

17. The method claimed in claim 14 , wherein the vacuum is applied to one end of the via hole.

18. The method claimed in claim 14 , wherein the conductive ink used to fill the space between the sidewalls is less dilute than the conductive ink used to form said multiple layers.

19. The method claimed in claim 14 , wherein applying the vacuum is followed by thermal processing to remove solvent and organic binder from the conductive ink.

20. The method claimed in claim 13 , wherein providing the base substrate further comprises removing residual conductive material from surfaces of the base substrate.

21. The method claimed in claim 13 , wherein the via hole is formed by laser drilling.

22. The method claimed in claim 21 , wherein said laser drilling is followed by annealing to smooth the sidewalls of the via hole.

23. A method for forming a multilayer circuit substrate, comprising:

providing a dielectric base substrate that has a hermetic via;

forming conductors on the base substrate;

forming sacrificial structures on the base substrate and conductors to define areas to be protected from deposition of a dielectric layer;

vacuum depositing a dielectric thin film on the base substrate, the conductors and the sacrificial structures;

removing the sacrificial structures to leave a patterned deposited dielectric thin film on the conductors and the base substrate;

forming a conductor on the base substrate in contact with the hermetic via; and

forming a cap over the conductor and the hermetic via.

24. The method claimed in claim 23 , wherein the cap is formed by a shadow mask deposition technique.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Sep 26, 2003
From: SHAH, RAJIV; PENDO, SHAUN
To: MEDTRONIC MINIMED, INC.
Reel/Frame 014559/0486 →
Continuity (3)
Continuation In Part 1033118600 · Dec 26, 2002
Provisional Application 6041428900 · Sep 27, 2002
Related Publication 20040061234A1 · Apr 1, 2004