Semiconductor devices with enlarged recessed gate electrodes
A semiconductor device includes a semiconductor substrate having a recess therein. A gate insulator is disposed on the substrate in the recess. The device further includes a gate electrode including a first portion on the gate insulator in the recess and a second reduced-width portion extending from the first portion. A source/drain region is disposed in the substrate adjacent the recess. The recess may have a curved shape, e.g., may have hemispherical or ellipsoid shape. The source/drain region may include a lighter-doped portion adjoining the recess. Relate fabrication methods are also discussed.
1. A semiconductor device comprising:
a semiconductor substrate having a recess therein;
a gate electrode comprising a first portion in the recess and a second reduced-width portion extending from the first portion;
a source/drain region in the substrate adjacent the recess; and
a gate insulator interposed between the first portion of the gate electrode and a surface of the recess, the gate insulator comprising a first portion disposed on a sidewall of the recess, in contact with the source/drain region and having a first thickness and a second portion disposed on a bottom of the recess, spaced apart from the source/drain region and having a second thickness less than the first thickness.
2. The semiconductor device of claim 1 , further comprising a nitride liner disposed between the first portion of the gate insulator and the recessed portion of the gate electrode.
3. The semiconductor device of claim 1 , further comprising:
an insulation layer on a surface of the substrate adjoining the second portion of the gate electrode above the substrate and extending over a portion of the first portion of the gate electrode; and
an insulating spacer disposed on a sidewall of the second portion of the gate electrode and on the insulation layer.
4. The semiconductor device of claim 3 , wherein the insulation layer comprises silicon oxide and the insulating spacer comprises silicon nitride.
5. The semiconductor device of claim 3 , wherein the insulating spacer comprises a first insulating spacer and further comprising a second insulating spacer on sidewalls of the insulation layer and the first insulating spacer.
6. The semiconductor device of claim 5 , wherein the source/drain region comprises a lighter-doped portion adjoining the recess.
7. The semiconductor device of claim 1 , wherein the gate electrode further comprises a third portion on the second portion, the third portion having a greater width than the second portion.
8. The semiconductor device of claim 7 , wherein the source/drain region comprises a lighter-doped portion adjoining the first portion of the gate insulator.
9. The semiconductor device of claim 1 , wherein the source/drain region comprises a lighter-doped portion nearer the recess.
10. The semiconductor device of claim 1 , wherein the recess has a curved shape.
11. The semiconductor device of claim 10 , wherein the recess is hemispherical or elliptical.
12. A semiconductor device comprising:
a semiconductor substrate having a recess therein;
a gate insulator on the substrate in the recess;
a gate electrode comprising a first portion on the gate insulator in the recess, a second reduced-width portion extending from the first portion, and a third portion on the second portion, the third portion having a greater width than the second portion;
a source/drain region in the substrate adjacent the recess;
an insulation layer on a surface of the substrate adjoining the second portion of the gate electrode above the substrate and extending over a portion of the first portion of the gate electrode; and
an insulating spacer disposed on a sidewall of the second portion of the gate electrode, on a sidewall of the third portion of the gate electrode and on the insulation layer.
13. The semiconductor device of claim 12 , wherein the insulation layer comprises silicon oxide and the insulating spacer comprises silicon nitride.
14. A semiconductor device comprising:
a semiconductor substrate having a recess therein;
a gate electrode comprising a first portion in the recess and a second reduced-width portion extending from the first portion wherein the gate electrode further comprises a third portion on the second portion, the third portion having a greater width than the second portion;
a source/drain region disposed in the substrate and spaced apart from the recess; and
a substantially uniform gate insulator layer lining the recess and interposed between the first portion of the gate electrode and a portion of the substrate between the recess and the source/drain region.
15. The semiconductor device of claim 14 , further comprising:
an insulation layer on a surface of the substrate adjoining the second portion of the gate electrode above the substrate and extending over a portion of the first portion of the gate electrode; and
an insulating spacer disposed on a sidewall of the second portion of the gate electrode, on a sidewall of the third portion of the gate electrode and on the insulation layer.
16. The semiconductor device of claim 15 , wherein the insulation layer comprises silicon oxide and the insulating spacer comprises silicon nitride.
17. The semiconductor device of claim 14 , wherein the source/drain region comprises a lighter-doped portion nearer the recess.
18. The semiconductor device of claim 14 , wherein the recess has a curved shape.
19. The semiconductor device of claim 18 , wherein the recess is hemispherical or elliptical.