IP Library › Granted Patent US 7,151,511
Granted Patent B2
US 7,151,511 · App. 09/912,596 · Granted Dec 19, 2006

Electro-optical device and driving method of the same

Assignee: Semiconductor Energy Laboratory Co., Ltd.
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Quick Facts
Patent No.
US 7,151,511
App. No.
09/912,596
Granted
Dec 19, 2006
Kind
B2
Abstract

In the electro-optical device for carrying out an image display by using n-bit (n is a natural number) digital image signals, one pixel incorporates n×m (m is a natural number) memory circuits, and has a function to store the digital image signals for m frames in the pixel (in examples shown in the drawings, n=3, m=2, and memory circuits A 1 to A 3 and B 1 to B 3 store signals for 3 bits×2 frames). Thus, in the display of a still picture, the digital image signals once stored in the memory circuits are repeatedly read out and a display is carried out for each frame, so that driving of a source signal line driver circuit is stopped during the display. Thus, the electric power consumption of the electro-optical device is reduced.

Claims (78)

1. A light-emitting device having a plurality of pixels, each of said plurality of pixels comprising:

a source signal line, n (n is a natural number, 2≦n) writing gate signal lines, n reading gate signal lines, n writing transistors, n reading transistors, n×m memory circuits for storing n-bit digital image signals for m frames (m is a natural number, 1≦m), n writing memory circuit selection portions, n reading memory circuit selection portions, a current supply line, an EL driving transistor, and an EL element, wherein:

gate electrodes of said n writing transistors are electrically connected to different ones of said n writing gate signal lines, one of a source region and a drain region of each of said n writing transistors is electrically connected to said source signal line, and the other of the source region and the drain region of each of said n writing transistors is electrically connected to signal input portions of said n writing memory circuit selection portions;

each of said n writing memory circuit selection portions includes m signal output portions, with said m signal output portions being respectively and electrically connected to signal input portions of different memory circuits;

each of said n reading memory circuit selection portions includes m signal input portions, with said m signal input portions being respectively and electrically connected to signal output portions of said different memory circuits; and

gate electrodes of said n reading transistors are electrically connected to different ones of said n reading gate signal lines, one of a source region and a drain region of each of said n reading transistors is electrically connected to different signal output portions of said n reading memory circuit selection portions, the other of the source region and the drain region of each of said n reading transistors is electrically connected to a gate electrode of said EL driving transistor, one of a source region and a drain region of said EL driving transistor is electrically connected to said current supply line, and the other of the source region and the drain region of said EL driving transistor is electrically connected to one electrode of said EL element.

2. A light-emitting device according to claim 1 , wherein:

each of said writing memory circuit selection portions selects any one of said memory circuits, and is electrically connected to one of said source region and said drain region of said writing transistor to write said digital image signal into said selected memory circuit; and

each of said reading memory circuit selection portions selects any one of said memory circuits in which said digital image signal is stored, and is electrically connected to one of said source region and said drain region of said reading transistor to read out said stored digital image signal.

3. A light-emitting device according to claim 1 , further comprising:

shift registers for sequentially outputting sampling pulses in accordance with a clock signal and a start pulse;

first latch circuits for holding said n-bit (n is a natural, number 2≦n) digital image signals in accordance with said sampling pulses;

second latch circuits to which said n-bit digital image signals held in said first latch circuits are transferred; and

bit signal selection switches for sequentially selecting said n-bit digital image signals transferred to said second latch circuits for each bit and for outputting said n-bit digital image signals to said source signal line.

4. A light-emitting device according to claim 1 , wherein said memory circuits are static memories (SRAM).

5. A light-emitting device according to claim 1 , wherein said memory circuits are ferroelectric memories (FeRAM).

6. A light-emitting device according to claim 1 , wherein said memory circuits are dynamic memories (DRAM).

7. A light-emitting device according to claim 1 , wherein said memory circuits are formed over one selected from the group consisting of a glass substrate, a plastic substrate, a stainless substrate, and a single crystal wafer.

8. A light-emitting device according to claim 1 , wherein said light-emitting device is an electro-luminescence display device.

9. A light-emitting device according to claim 1 , wherein said light-emitting device is incorporated in one selected from the group consisting of a video camera, a personal computer, a portable telephone, a head-mount display, a digital camera, and a portable electronic book.

10. The light-emitting device of claim 1 , wherein m>1.

11. A light-emitting device having a plurality of pixels, each of said plurality of pixels comprising:

n (n is a natural number, 2≦n) source signal lines, a writing gate signal line, n reading gate signal lines, n writing transistors, n reading transistors, n×m memory circuits for storing n-bit digital image signals for m frames (m is a natural number, 1≦m), n writing memory circuit selection portions, n reading memory circuit selection portions, a current supply line, an EL driving transistor, and an EL element, wherein:

gate electrodes of said n writing transistors are electrically connected to said writing gate signal line, one of a source region and a drain region of each of said n writing transistors is electrically connected to a different one of said n source signal lines, the other of the source region and the drain region of each of said n writing transistors is electrically connected to signal input portions of said n writing memory circuit selection portions;

each of said n writing memory circuit selection portions includes m signal output portions, with said m signal output portions being respectively and electrically connected to signal input portions of different memory circuits;

each of said n reading memory circuit selection portions includes m signal input portions, with said m signal input portions being respectively and electrically connected to signal output portions of said different memory circuits; and

gate electrodes of said n reading transistors are electrically connected to any different one of said n reading gate signal lines, one of a source region and a drain region is electrically connected to different signal output portions of said n reading memory circuit selection portions, the other of the source region and the drain region of each of said n reading transistors is electrically connected to a gate electrode of the EL driving transistor, one of a source region and a drain region of said EL driving transistor is electrically connected to said current supply line, and the other of the source region and the drain region of said EL driving transistor is electrically connected to one electrode of said EL element.

12. A light-emitting device according to claim 11 , further comprising:

shift registers for sequentially outputting sampling pulses in accordance with a clock signal and a start pulse; and

first latch circuits for holding 1-bit digital image signals of said n-bit (n is a natural number, 2≦n) digital image signals in accordance with said sampling pulses and for outputting said 1-bit digital image signals to said source signal lines.

13. A light-emitting device according to claim 11 , wherein:

each of said writing memory circuit selection portions selects any one of said memory circuits, and is electrically connected to one of said source region and said drain region of said writing transistor to write said digital image signal into said selected memory circuit; and

each of said reading memory circuit selection portions selects any one of said memory circuits in which said digital image signal is stored, and is electrically connected to one of said source region and said drain region of said reading transistor to read out said stored digital image signal.

14. A light-emitting device according to claim 11 , wherein said memory circuits are static memories (SRAM).

15. A light-emitting device according to claim 11 , wherein said memory circuits are ferroelectric memories (FeRAM).

16. A light-emitting device according to claim 11 , wherein said memory circuits are dynamic memories (DRAM).

17. A light-emitting device according to claim 11 , wherein said memory circuits are formed over one selected from the group consisting of a glass substrate, a plastic substrate, a stainless substrate, and a single crystal wafer.

18. A light-emitting device according to claim 11 , wherein said light-emitting device is an electro-luminescence display device.

19. A light-emitting device according to claim 11 , wherein said light-emitting device is incorporated in one selected from the group consisting of a video camera, a personal computer, a portable telephone, a head-mount display, a digital camera, and a portable electronic book.

20. The light-emitting device of claim 11 , wherein m>1.

21. A light-emitting device having a plurality of pixels, each of said plurality of pixels comprising:

a source signal line, n (n is a natural number, 2≦n) writing transistors, n reading transistors, n×m memory circuits for storing n-bit digital image signals for m frames (m is a natural number, 1≦m), n writing memory circuit selection portions, n reading memory circuit selection portions, a current supply line, an EL driving transistor, and an EL element, wherein:

one of a source region and a drain region of each of said n writing transistors is electrically connected to said source signal line, and the other of the source region and the drain region of each of said n writing transistors is electrically connected to signal input portions of said n writing memory circuit selection portions;

each of said n writing memory circuit selection portions includes m signal output portions, with said m signal output portions being respectively and electrically connected to signal input portions of different memory circuits;

each of said n reading memory circuit selection portions includes m signal input portions, with said m signal input portions being respectively and electrically connected to signal output portions of said different memory circuits; and

one of a source region and a drain region of each of said n reading transistors is electrically connected to different signal output portions of said n reading memory circuit selection portions, the other of the source region and the drain region of each of said n reading transistors is electrically connected to a gate electrode of said EL driving transistor, one of a source region and a drain region of said EL driving transistor is electrically connected to said current supply line, and the other of the source region and the drain region of said EL driving transistor is electrically connected to one electrode of said EL element.

22. A light-emitting device according to claim 21 , wherein:

each of said writing memory circuit selection portions selects any one of said memory circuits, and is electrically connected to one of said source region and said drain region of said writing transistor to write said digital image signal into said selected memory circuit; and

each of said reading memory circuit selection portions selects any one of said memory circuits in which said digital image signal is stored, and is electrically connected to one of said source region and said drain region of said reading transistor to read out said stored digital image signal.

23. A light-emitting device according to claim 21 , further comprising:

shift registers for sequentially outputting sampling pulses in accordance with a clock signal and a start pulse;

first latch circuits for holding said n-bit (n is a natural number, 2≦n) digital image signals in accordance with said sampling pulses;

second latch circuits to which said n-bit digital image signals held in said first latch circuits are transferred; and

bit signal selection switches for sequentially selecting said n-bit digital image signals transferred to said second latch circuits for each bit and for outputting said n-bit digital image signals to said source signal line.

24. A light-emitting device according to claim 21 , wherein said memory circuits are static memories (SRAM).

25. A light-emitting device according to claim 21 , wherein said memory circuits are ferroelectric memories (FeRAM).

26. A light-emitting device according to claim 21 , wherein said memory circuits are dynamic memories (DRAM).

27. A light-emitting device according to claim 21 , wherein said memory circuits are formed over one selected from the group consisting of a glass substrate, a plastic substrate, a stainless substrate, and a single crystal wafer.

28. A light-emitting device according to claim 21 , wherein said light-emitting device is an electro-luminescence display device.

29. A light-emitting device according to claim 21 , wherein said light-emitting device is incorporated in one selected from the group consisting of a video camera, a personal computer, a portable telephone, a head-mount display, a digital camera, and a portable electronic book.

30. A light-emitting device having a plurality of pixels, each of said plurality of pixels comprising:

n (n is a natural number, 2≦n) source signal lines, n writing transistors, n reading transistors, n×m memory circuits for storing n-bit digital image signals for m frames (m is a natural number, 1≦m), n writing memory circuit selection portions, n reading memory circuit selection portions, a current supply line, an EL driving transistor, and an EL element, wherein:

one of a source region and a drain region of each of said n writing transistors is electrically connected to a different one of said n source signal lines, the other of the source region and the drain region of each of said n writing transistors is electrically connected to signal input portions of said n writing memory circuit selection portions;

each of said n writing memory circuit selection portions includes m signal output portions, with said m signal output portions being respectively and electrically connected to signal input portions of different memory circuits;

each of said n reading memory circuit selection portions includes m signal input portions, with said m signal input portions being respectively and electrically connected to signal output portions of said different memory circuits; and

one of a source region and a drain region is electrically connected to different signal output portions of said n reading memory circuit selection portions, the other of the source region and the drain region of each of said n reading transistors is electrically connected to a gate electrode of the EL driving transistor, one of a source region and a drain region of said EL driving transistor is electrically connected to said current supply line, and the other of the source region and the drain region of said EL driving transistor is electrically connected to one electrode of said EL element.

31. A light-emitting device according to claim 30 , further comprising:

shift registers for sequentially outputting sampling pulses in accordance with a clock signal and a start pulse; and

first latch circuits for holding 1-bit digital image signals of said n-bit (n is a natural number, 2≦n) digital image signals in accordance with said sampling pulses and for outputting said 1-bit digital image signals to said source signal lines.

32. A light-emitting device according to claim 30 , wherein:

each of said writing memory circuit selection portions selects any one of said memory circuits, and is electrically connected to one of said source region and said drain region of said writing transistor to write said digital image signal into said selected memory circuit; and

each of said reading memory circuit selection portions selects any one of said memory circuits in which said digital image signal is stored, and is electrically connected to one of said source region and said drain region of said reading transistor to read out said stored digital image signal.

33. A light-emitting device according to claim 30 , wherein said memory circuits are static memories (SRAM).

34. A light-emitting device according to claim 30 , wherein said memory circuits are ferroelectric memories (FeRAM).

35. A light-emitting device according to claim 30 , wherein said memory circuits are dynamic memories (DRAM).

36. A light-emitting device according to claim 30 , wherein said memory circuits are formed over one selected from the group consisting of a glass substrate, a plastic substrate, a stainless substrate, and a single crystal wafer.

37. A light-emitting device according to claim 30 , wherein said light-emitting device is an electro-luminescence display device.

38. A light-emitting device according to claim 30 , wherein said light-emitting device is incorporated in one selected from the group consisting of a video camera, a personal computer, a portable telephone, a head-mount display, a digital camera, and a portable electronic book.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jul 26, 2001
From: KOYAMA, JUN
To: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
Reel/Frame 012029/0975 →
Priority Claims (1)
JP 2000-240324 · Aug 8, 2000 · national
Continuity (1)
Related Publication 20020018029A1 · Feb 14, 2002