IP Library › Granted Patent US 7,154,501
Granted Patent B2
US 7,154,501 · App. 10/892,598 · Granted Dec 26, 2006

Method and apparatus for three-dimensional parallax drawing

Assignee: Samsung Electronics Co., Ltd.
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Quick Facts
Patent No.
US 7,154,501
App. No.
10/892,598
Granted
Dec 26, 2006
Kind
B2
Abstract

A three dimensional parallax drawing system for use in three dimensional graphics or virtual reality is disclosed. The parallax drawing system includes a three dimensional address generator which generates the original X-axis, Y-axis and Z-axis addresses of an image, and an address correction circuit for producing a corrected X-axis address in response to the original X-axis and Z-axis address outputs from the address generator. Also included is an address selection circuit for selecting either the original X-axis address supplied from the three dimensional address generator or the corrected X-axis address from the address correction circuit as a resultant X-axis address in response to a stereo graphic mode request signal. A frame buffer address generator is provided for converting the resultant X-axis address received from the address selection means and the Y-axis address received from the three dimensional address generator into the frame buffer linear address. The X-axis parallax of human eyes relative to all points of an object can be converted into the X-axis addresses. Thus, once the 3-D image of the object is projected by separating the left and right eyes' views and reflecting the corrected X-axis addresses, a more vivid image having a better perspective of distance can be seen though the LCD shutters.

Claims (38)

1. A three dimensional parallax drawing system comprising:

an address generator for generating an original X-axis address, a Y-axis address, and a Z-axis address of an image;

an address correction unit for producing a corrected X-axis address in response to the original X-axis address and the Z-axis address from the address generator;

an address selection unit for selecting either the original X-axis address supplied from the address generator or the corrected X-axis address from the address correction means as a resultant X-axis address in response to a stereo graphic mode request signal; and

a frame buffer address generator for converting the resultant X-axis address received from the address selection means and the Y-axis address received from the address generator into a frame buffer linear address.

2. The system of claim 1 , wherein the address correction unit comprises:

an operation unit for receiving the Z-axis address and calculating a correction amount; and

an adder for generating the corresponding corrected X-axis address responsive to the original X-axis address and the correction amount.

3. The system of claim 1 , wherein the address selection unit includes a multiplexer.

4. A drawing method for a three dimensional parallax drawing system, the method comprising:

generating an original X-axis address, a Y-axis address, and a Z-axis address of an image with a 3-D address generator;

generating a corrected X-axis address in response to the original X-axis address and the Z-axis address;

selecting either the original X-axis address or the corrected X-axis address as a resultant X-axis address in response to a stereo graphic mode request signal; and

converting the resultant X-axis address and the Y-axis address into a frame buffer address.

5. A three dimensional parallax drawing system comprising:

an address correction circuit having a first input configured to receive an original X-axis address from an address generator, a second input configured to receive a Z-axis address from the address generator, and an output configured to provide a corrected X-axis address in response to the original X-axis address and the Z-axis address; and

an address selection circuit having a first input configured to receive the original X-axis address, a second input coupled to the output of the address correction circuit, a control input configured to receive a mode request signal, and an output configured to provide a resultant X-axis address to a frame buffer address generator in response to the original X-axis address, the corrected X-axis address, and the mode request signal.

6. The system of claim 5 , wherein the address correction circuit comprises:

an operation unit having an input configured to receive the Z-axis address from the address generator and an output configured to provide a correction amount; and

an adder having a first input configured to receive the original X-axis address from the address generator, a second input configured to receive the correction amount, and an output configured to provide the corrected X-axis address responsive to the original X-axis address and the correction amount.

7. The system of claim 5 , wherein the address selection circuit comprises a multiplexer configured to select either the original X-axis address or the corrected X-axis address as the resultant X-axis address responsive to the mode request signal.

8. A three dimensional parallax drawing method comprising:

calculating a correction amount responsive to a Z-axis address;

adding the correction amount to an original X-axis address, thereby generating a corrected X-axis address; and

selecting either the original X-axis address or the corrected X-axis address as a resultant X-axis address responsive to a stereo graphic mode request signal.

9. A three dimensional parallax drawing system comprising:

an address generator configured to generate an original X-axis address, a Y-axis address, and a Z-axis address of a plurality of points in a frame of an image; and

an address correction circuit coupled to the address generator, the address correction circuit configured to generate a correction amount for each of the plurality of points responsive to the Z-axis address for each point, wherein the correction amount for each of the plurality of points may be different, the address correction circuit also configured to generate a corrected X-axis address for each of the plurality of points responsive to the original X-axis address and the correction amount for each of the plurality of points.

10. The system of claim 9 , wherein the address correction circuit generates the corrected X-axis address for each of the plurality of points by adding the correction amount to the original X-axis address for each of the plurality of points.

11. The system of claim 9 , further comprising an address selection circuit coupled to the address generator and the address correction circuit for selecting either the original X-axis address or the corrected X-axis address as a resultant X-axis address in response to a stereo graphic mode request signal.

12. The system of claim 11 , further comprising a frame buffer address generator coupled to the address generator and the address selection circuit for converting the resultant X-axis address Y-axis address into a frame buffer address.

13. A method of converting three dimensional image data into a two dimensional image having a first view for a first eye and a second view for a second eye, the method comprising:

generating an original X-axis address, a Y-axis address, and a Z-axis address of a three dimensional image;

generating a corrected X-axis address for the first view in response to the original X-axis address and the Z-axis address;

utilizing the corrected X-axis address and the Y-axis address for the first view; and

utilizing the original X-axis address and the Y-axis address for the second view.

14. The method of claim 13 , wherein the first and second views are interlaced on a display.

15. The method of claim 14 , further comprising utilizing shutters to present the first view to the first eye and the second view to the second eye.

Priority Claims (1)
KR 96-45143 · Oct 10, 1996 · national
Continuity (3)
Continuation 0958349500 · May 30, 2000
Continuation 0894865100 · Oct 10, 1997
Related Publication 20050001833A1 · Jan 6, 2005