IP Library › Granted Patent US 7,157,352
Granted Patent B2
US 7,157,352 · App. 10/680,548 · Granted Jan 2, 2007

Method for producing ultra-thin semiconductor device

Assignee: Sony Corporation
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Quick Facts
Patent No.
US 7,157,352
App. No.
10/680,548
Granted
Jan 2, 2007
Kind
B2
Abstract

A method for producing an ultra-thin semiconductor chip and an ultra-thin back-illuminated solid-state image pickup device utilizing a semiconductor layer formed on a support substrate via an insulating layer to improve separation performance of a semiconductor layer from a support substrate and thereby improve the productivity and quality. The method uses two porous peeling layers on opposite sides of a substrate to produce an ultra-thin substrate.

Claims (10)

1. A method of production of an ultrathin semiconductor device comprising the steps of:

forming a first single crystalline semiconducinr layer on a seed substrate via a first porous semiconductor peeling layer;

bonding said seed substrate from said first single crystalline semiconductor layer side in the state with an insulating layer interposed to a support substrate having a second single crystalline semiconductor layer formed thereon via a second porous semiconductor peeling layer wherein the first porous semiconductor peeling layer has a greater porosity than the second porous semiconductor peeling layer;

separating said seed substrate using said first porous semiconductor peeling layer as an interface; and

separating said support substrate using said second porous semiconductor peeling layer as an interface to obtain said first single crystalline semiconductor layer formed on said insulating layer.

2. A method of production of an ultra-thin semiconductor device comprising the steps of:

forming a first single crystalline semiconductor layer on a seed substrate via a first porous semiconductor peeling layer;

bonding said seed substrate from said first single crystalline semiconductor layer side in the state with an insulating layer interposed to a support substrate having a second single crystalline semiconductor layer formed thereon via a second porous semiconductor peeling layer wherein the first porous semiconductor peeling layer has a greater thickness than the second porous semiconductor peeling layer;

separating said seed substrate using said first porous semiconductor peeling layer as an interface; and

separating said support substrate using said second porous semiconductor peeling laycr as an interface to obtain said first single crystalline semiconductor layer formed on said insulating layer.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 17, 2004
From: YAMANAKA, HIDEO
To: SONY CORPORATION
Reel/Frame 015335/0984 →
Priority Claims (1)
JP P2002-299563 · Oct 11, 2002 · national
Continuity (1)
Related Publication 20050074954A1 · Apr 7, 2005