Method for fabricating a tuning fork gyroscope
View Patent ↗A method for reducing errors in a tuning fork gyroscope includes determining a first distance, g t , between an upper sense plate and a proof mass and a second distance, g b , between a lower sense plate and the proof mass. The method further includes applying a first voltage, V t , to the upper sense plate and a second voltage, V b , to the lower sense plate, wherein the ratio of the first voltage and the second voltage is a function of the first distance and the second distance.
1. A method for fabricating a tuning fork gyroscope with upper and lower sense plates, the method comprising:
providing a silicon substrate;
etching the silicon substrate to provide at least one recess in the silicon substrate;
producing a structure layer having a predetermined thickness;
etching the structure layer to provide at least one proof mass;
applying a metal coating to the silicon substrate beneath a portion of each proof mass;
providing a glass substrate;
etching the glass substrate to provide at least one recess in the glass substrate;
depositing a multimetal layer to the at least one recess;
electrostatically bonding the silicon substrate to the glass substrate; and
etching the silicon substrate down to the structure layer.
2. The method of claim 1 wherein the proof masses have a thickness in the range of 5 to 100 μm.
3. The method of claim 1 wherein the multimetal layer is chosen from the group consisting of Ti/Pt/Au and Ti/Pt.
4. The method of claim 1 in which producing a structure layer includes diffusing boron onto a surface of the silicon substrate.
5. The method of claim 4 in which diffusing boron onto a surface of the silicon substrate includes diffusing boron-geranium silicon to define structural thickness.
6. The method of claim 1 in which producing a structure layer includes growing epitaxial silicon with boron onto a surface of the silicon substrate to define structural thickness.
7. The method of claim 4 in which boron is diffused into a silicon substrate to define structural thickness.
8. The method of claim 4 including the further step of applying KOH thinning prior to etching the silicon substrate.
9. The method of claim 4 in which diffusing boron onto a surface of the silicon substrate includes diffusing silicon-on-insulator to define structural thickness.
10. The method of claim 1 wherein the silicon substrate includes a lightly doped layer and a highly doped epitaxial layer.
11. The method of claim 10 wherein the thickness of said highly doped epitaxial layer is between 5 and 100 μm thick.
12. The method of claim 1 wherein the etching of the silicon substrate is plasma enhanced ion etching.
13. The method of claim 1 wherein the structure layer is 5 to 100 μm thick.
14. The method of claim 1 wherein the structure layer is 5 to 20 μm thick.
15. The method of claim 1 wherein connecting posts between the silicon substrate and the glass substrate are defined by reactive ion etching.
16. The method of claim 1 wherein the recesses in the glass substrate are approximately 1700 Å deep.
17. The method of claim 1 further including:
providing a second glass substrate;
etching said second glass substrate to provide at least one indentation in the second glass substrate;
depositing at least one metal run in said at least one indentation in the second glass substrate;
cutting a gap between said at least one proof mass and said second glass substrate;
exposing at least one bonding pad; and
bonding said second glass substrate to said structure layer.
18. The method of claim 1 wherein exposing at least one bonding pad includes water drilling.