System and method for hydrogen exfoliation

1. A hydrogen (H) exfoliation method for attaching silicon-on-insulator (SOI) substrate fabricated circuits to carrier substrates, the method comprising:

providing a SOI substrate, including a silicon (Si) active layer and buried oxide (BOX) layer overlying a Si substrate;

forming a circuit in the Si active layer;

forming a blocking mask over selected circuit areas;

implanting H in the Si substrate;

in response to the H implanting, forming a cleaving plane in the Si substrate;

bonding the circuit to a carrier substrate;

cleaving the Si substrate:

wherein forming a cleaving plane in the Si substrate includes forming a horizontal peak concentration (Rp) H layer in a mask non-underlying area in the Si substrate; and,

wherein cleaving the Si substrate includes:

cleaving a first region along the horizontal Rp layer in the mask non-underlying area in the Si substrate;

cleaving a second region along a horizontal interface between the buried oxide layer and Si substrate; and,

cleaving vertically between the first and second regions.

2. The method of claim 1 wherein forming a circuit in the Si active layer includes forming a thin-film transistor (TFT); and,

wherein forming a blocking mask over selected circuit areas includes forming the blocking mask overlying a TFT gate.

3. The method of claim 1 wherein forming a circuit in the Si active layer includes forming a circuit at process temperatures greater than a first temperature; and,

wherein bonding the circuit to a carrier substrate includes bonding to a carrier substrate sensitive to temperatures greater than the first temperature.

4. The method of claim 3 wherein bonding to a carrier substrate sensitive to temperatures greater than the first temperature includes bonding to a carrier substrate selected from the group including glass, plastic, quartz, metal foil, and a carrier fabricated with components sensitive to temperatures greater than the first temperature.

5. The method of claim 4 wherein forming a circuit at process temperatures greater than a first temperature includes forming a circuit at a temperature greater than 600 degrees C.

6. The method of claim 1 wherein implanting H in the Si substrate includes:

implanting H in a form selected from the group including H+ and H2;

implanting at a maximum energy of 1 MeV; and

implanting at a dosage in the range of 5×10 15 to 5×10 17 .

7. The method of claim 1 further comprising:

following the H implanting, removing the blocking mask;

depositing a top oxide layer overlying the circuit;

planarizing the top oxide layer; and

wherein bonding the circuit to a carrier substrate includes directly bonding the top oxide layer to the carrier substrate.

8. The method of claim 1 further comprising:

annealing the Si substrate; and,

wherein cleaving the Si substrate includes cleaving in response to the annealing.

9. The method of claim 8 wherein annealing the Si substrate includes annealing at a temperature in the range of 400 to 600 degrees C.

10. The method of claim 8 wherein implanting H in the Si substrate additionally includes implanting boron at a dosage in the range of 5×10 12 to 5×10 14 at/cm 2 ; and,

wherein annealing the Si substrate includes annealing at a temperature in the range of 200 to 300 degrees C.

11. The method of claim 1 wherein cleaving the Si substrate includes cleaving in response to a mechanical separation process.

12. The method of claim 1 wherein forming a blocking mask over selected circuit areas includes forming a mask from a photoresist material.

13. The method of claim 1 wherein implanting H in the Si substrate additionally includes implanting a species selected from the group including boron, He, Ne, Ar, and Si.

14. The method of claim 1 further comprising:

following the cleaving of the Si substrate, ion etching; and, removing any remaining Si substrate material.

15. The method of claim 1 wherein forming a circuit in the Si active layer includes forming a circuit selected from the group including TFTs, CMOS circuits, and VLSI devices.

16. The method of claim 1 wherein implanting H in the Si substrate includes:

implanting H at a dosage in the range of 2×10 16 at/cm 2 to 3×10 16 at/cm 2 ; and,

additionally implanting He at a dosage in the range of 1×10 16 at/cm 2 to 3×10 16 at/cm 2.

17. The method of claim 1 wherein forming a blocking mask over selected circuit areas includes forming a blocking mask over selected areas of the Si substrate; and,

the method further comprising:

in response to the blocking mask, preventing the formation of H in the selected areas of the Si substrate.