Semiconductor device and a method of manufacturing the same
In a semiconductor device, the ohmic contact at the junction between the metal interconnection and the semiconductor layer is lowered by depositing a first conductor layer comprised of, for example, tungsten nitride and a second conductor layer comprised of, for example, tungsten silicide successively from the lower layer so as to cover the upper surface of intermediate conductive layers comprised of a metal, for example, tungsten as a main interconnection material, subsequently introducing an impurity, for example, boron (b) to the second conductor layer, then patterning the first and the second conductor layers thereby forming a conductor layer, and then forming a lower semiconductor layer comprised of, for example, polycrystal silicon for forming a semiconductor region for source and drain of load MISFET of SRAM so as to be in contact with the conductor layer.
1. A method of manufacturing a semiconductor device comprising the steps of:
(a) forming a metal interconnection over a semiconductor substrate;
(b) forming a semiconductor layer over the metal interconnection in a state in contact with the metal interconnection;
(c) depositing an insulation film over the semiconductor substrate so as to cover the metal interconnection and the semiconductor layer;
(d) forming an interconnection opening reaching the semiconductor layer in the insulation film;
(e) depositing a metal film over the insulation film including the interconnection opening;
(f) applying a heat treatment to the semiconductor substrate, thereby forming a suicide layer in self-alignment with the interconnection at the contact boundary between the semiconductor layer in the interconnection opening and the metal film;
(g) removing the unreacted metal film after the step (f); and
(h) forming an n-type or p-type semiconductor layer in the interconnection opening after the step (g) in a state in contact with the silicide layer.
2. A method of manufacturing a semiconductor device according to claim 1 , comprising the steps in order to form a field effect transistor over the semiconductor substrate after the step (h):
(i) forming, over the semiconductor layer, a stacked body comprising a semiconductor including a semiconductor region for source and drain and extending in the direction perpendicular to the main surface of the semiconductor substrate;
(j) forming a gate insulation film to the lateral side of the stacked body; and
(k) forming a gate electrode to the lateral side of the stacked body by way of the gate insulation film.
3. A method of manufacturing a semiconductor device according to claim 1 , wherein the silicide layer is cobalt silicide, platinum silicide, nickel silicide.
4. A method of manufacturing a semiconductor device according to claim 1 , wherein the main interconnection material for the metal interconnection is tungsten.
5. A method of manufacturing a semiconductor device comprising the steps of:
(a) forming a MISFET having a first gate electrode, a first gate insulation film, a first source region and a first drain region over a semiconductor substrate;
(b) forming a first insulation film over the MISFET;
(c) forming a metal interconnection in the first insulation film;
(d) forming a silicide layer over the metal interconnection;
(e) introducing a first impurity into the silicide layer; and
(f) forming, over the silicide layer, an n-type or p-type semiconductor layer containing an impurity forming a conduction type identical with that of the first impurity in a state in contact with the silicide layer.
6. A method of manufacturing a semiconductor device according to claim 5 , comprising the steps, in order to form a capacitor over the metal interconnection, after the step (f), of:
(g) forming a capacitive insulation film over the semiconductor layer; and
(h) forming a conductor layer for an electrode over the capacitive insulation film.
7. A method of manufacturing a semiconductor device according to claim 5 , comprising the steps, in order to form a field effect transistor over the metal interconnection after the step (f), of:
(g) forming a insulation second gate film over the semiconductor layer;
(h) forming a second gate electrode over the second gate insulation film; and
(i) forming a second source region and a second drain region in the semiconductor layer.
8. A method of manufacturing a semiconductor device according to claim 5 ,
wherein the main interconnection material for the metal interconnection is tungsten, and the silicide layer is tungsten silicide, titanium silicide or nickel silicide.
9. A method of manufacturing a semiconductor device according to claim 5 ,
wherein a plasma treatment is applied to the metal interconnection after the step (c) and before the step (d).
10. A method of manufacturing a semiconductor device according to claim 9 ,
wherein the plasma treatment is a plasma treatment applied in an ammonia gas, argon gas, nitrogen gas or fluorine gas atmosphere.
11. A method of manufacturing a semiconductor device according to claim 5 ,
wherein the step of forming the metal interconnection in the step (c) comprises the steps of:
(c1) forming an interconnection opening in the first insulation film;
(c2) depositing a metal film over the first insulation film including the interconnection opening; and
(c3) forming the metal interconnection in the first interconnection opening by removing the metal film outside of the interconnection opening.
12. A method of manufacturing a semiconductor device according to claim 11 ,
wherein a plasma treatment is applied to the metal interconnection after the step (c) and before the step (d).
13. A method of manufacturing a semiconductor device comprising the steps of:
(a) forming a MISFET having a first gate electrode, a first gate insulation, film, a first source region and a first drain region over a semiconductor substrate;
(b) forming a first insulation film over the MISFET;
(c) forming a metal interconnection in the first insulation film;
(d) introducing a first conductor layer over the metal interconnection in a state in contact with the metal interconnection;
(e) forming a second conductor layer comprising a silicide layer over the first conductor layer in a state in contact with the first conductor layer;
(f) introducing a first impurity into the second conductor layer; and
(g) forming, over the second conductor layer, an n-type or p-type semiconductor layer containing an impurity forming a conductor type identical with that of the first impurity in a state in contact with the second conductor layer.
14. A method of manufacturing a semiconductor device according to claim 13 , comprising the steps, in order to form a field effect transistor over the metal interconnection after the step (g), of:
(h) forming, over the semiconductor layer, a stacked body comprising a semiconductor including a second source region and a second drain region, and extending in the direction perpendicular to the main surface of the semiconductor substrate; and
(i) forming a second gate insulation film to the lateral side of the stacked body.
15. A method of manufacturing a semiconductor device according to claim 13 ,
wherein the main interconnection material for the metal interconnection is tungsten, and the silicide layer is tungsten silicide, titanium silicide or nickel silicide.
16. A method of manufacturing a semiconductor device according to claim 13 ,
wherein a plasma treatment is applied to the metal interconnection after the step (c) and before the step (d).
17. A method of manufacturing a semiconductor device according to claim 16 ,
wherein the plasma treatment is a plasma treatment applied in an ammonia gas, argon gas, nitrogen gas or fluorine gas atmosphere.
18. A method of manufacturing a semiconductor device according to claim 13 ,
wherein the step of forming the metal interconnection in the step (c) includes the steps of:
(c1) forming an interconnection opening in the insulation film;
(c2) depositing a metal film over the insulation film including the interconnection opening; and
(c3) forming the metal interconnection inside the interconnection opening by removing the metal film outside of the interconnection opening.
19. A method of manufacturing a semiconductor device according to claim 18 ,
wherein a plasma treatment is applied to the metal interconnection after the step (c) and before the step (d).
20. A method of manufacturing a semiconductor device comprising the steps of:
(a) forming a MISFET having a first gate electrode, a first gate insulation film, a first source region and a first drain region over a semiconductor substrate;
(b) forming a first insulation film over the MISFET;
(c) forming an interconnection in the first insulation film;
(d) forming a silicide layer over the interconnection;
(e) introducing a first impurity into the silicide layer; and
(f) forming, over the silicide layer, a semiconductor layer containing the first impurity.
21. A method of manufacturing a semiconductor device according to claim 20 , comprising the steps, in order to form a field effect transistor over the metal interconnection after the step (f), of:
(g) forming a capacitive insulation film over the semiconductor layer; and
(g) forming a conductor layer for an electrode over the capacitive insulation film.
22. A method of manufacturing a semiconductor device according to claim 20 , comprising the steps, in order to form a field effect transistor over the interconnection after the step (f), of:
(g) forming a second gate insulation film over the semiconductor layer;
(h) forming a second gate electrode over and a second gate insulation film; and
(i) forming a second source region and a second drain region in the semiconductor layer.
23. A method of manufacturing a semiconductor device according to claim 20 ,
wherein the main interconnection material for the interconnection is tungsten, and the silicide layer is tungsten silicide, titanium silicide or nickel silicide.
24. A method of manufacturing a semiconductor device according to claim 20 ,
wherein the step of forming the interconnection in the step (c) comprises the steps of:
(c1) forming an interconnection opening in the first insulation film;
(c2) depositing a metal film over the first insulation film including the interconnection opening; and
(c3) forming the interconnection in the first interconnection opening by removing the metal film outside of the interconnection opening.
25. A method of manufacturing a semiconductor device according to claim 24 ,
wherein a plasma treatment is applied to the interconnection after the step (c) and before the step (d).
26. A method of manufacturing a semiconductor device according to claim 25 ,
wherein the plasma treatment is a plasma treatment applied in an ammonia gas, argon gas, nitrogen gas or fluorine gas atmosphere.