Path timing detection method, path timing detection apparatus, and adaptive array antenna system
To provide a path timing detection method for an adaptive array antenna system realizing improved path timing detection characteristics and high-quality demodulation results by simple processing. A sliding correlator despreads signals from antennas over a plurality of chip timings. A multibeam former forms a plurality of directional beams from outputs of the sliding correlator. A per-beam delay profile generation means generates a delay profile averaged in a certain cycle with respect to each beam by using the signal sequences of the beams from the multibeam former. A path timing detection means detects path timings one after another from the generated delay profiles with respect to the respective beams by using a minimum selection timing interval centered on a chip timing already selected as a path timing and a minimum selection beam interval centered on the beam having the chip timing already selected.
1. A path timing detection method in which code division multiple access signals are received by an array antenna and path timings are detected, said method comprising:
a step of despreading the received signals over a plurality of chip timings and outputting despread signal sequences;
a step of forming a plurality of directional beams from the despread signal sequences and outputting signal sequences of the respective beams;
a step of generating delay profiles with respect to the respective beams from the signal sequences of the respective beams; and
a step of selecting path timings one after another from chip timings in all the delay profiles,
wherein, in said step of selecting the path timings, chip timings within a minimum selection timing interval corresponding to ±Nr chip timings centered about a chip timing already selected as a one of the path timings and chip timings within the minimum selection timing interval in each beam within a minimum selection beam interval corresponding to ±Nb beams centered about the beam associated with the one of the chip timings already selected are not selected in path timing detection subsequently performed, wherein Nr is an integer greater than or equal to one, and wherein Nb is an integer greater than or equal to one.
2. A path timing detection apparatus which receives code division multiple access signals by an array antenna and detects path timings, said apparatus comprising:
first means for forming a plurality of directional beams based on the received signals and generating delay profiles with respect to the respective beams; and
second means for selecting path timings one after another from chip timings in all the delay profiles,
wherein said second means does not select chip timings within a minimum selection timing interval corresponding to ±Nr chip timings centered about a chip timing already selected as one of the path timings and chip timings within the minimum selection timing interval in each beam within a minimum selection beam interval corresponding to ±Nb beams centered about the beam associated with the one of the chip timings already selected, wherein Nr is an integer greater than or equal to one, and wherein Nb is an integer greater than or equal to one.
3. The path timing detection apparatus according to claim 2 , wherein said first means has
a sliding correlator which despreads the signals over a plurality of chip timings, and which outputs despread signal sequences,
a multibeam former which forms the plurality of directional beams from the despread signal sequences, and which outputs signal sequences of the respective beams, and
per-beam delay profile generation means for generating the delay profiles with respect to the respective beams from the signal sequences of the respective beams.
4. An adaptive array antenna system comprising a path timing detection section in which code division multiple access signals are received by an array antenna and path timings are detected, and a reception and demodulation section in which reception and demodulation are performed, said path timing detection section having:
a sliding correlator which despreads the received signals over a plurality of chip timings, and which outputs despread signal sequences;
a multibeam former which forms a plurality of directional beams from the despread signal sequences, and which outputs signal sequences of the respective beams;
per-beam delay profile generation means for generating delay profiles with respect to the respective beams from the signal sequences of the respective beams; and
path timing detection means for selecting path timings one after another from chip timings in all the delay profiles and outputting the path timings to said reception and demodulation sections,
wherein said path timing detection means does not select chip timings within a minimum selection timing interval corresponding to ±Nr chip timings centered about a chip timing already selected as one of the path timings and chip timings within the minimum selection timing interval in each beam within a minimum selection beam interval corresponding to ±Nb beams centered about the beam associated with the one of the chip timings already selected, wherein Nr is an integer greater than or equal to one, and wherein Nb is an integer greater than or equal to one.
5. The path timing detection method according to claim 1 , wherein the step of forming a plurality of direction beams comprises:
multiplying the despread signal sequences with beam weights, to obtained multiplied signals; and
combining the multiplied signals to obtain the signal sequences of the respective beams.
6. The adaptive array system according to claim 4 , wherein the multibeam former comprises:
a plurality of multipliers for multiplying the despread signal sequences with beam weights, to obtained multiplied signals; and
a plurality of combiners for combining the multiplied signals to obtain the signal sequences of the respective beams.