Tunable temperature coefficient of resistance resistors and method of fabricating same

1. A structure comprising:

a first resistor comprising a first metal, conductive metal oxide or metal silicide first material, said first material having a first temperature coefficient of resistance, said first resistor in a first interlevel dielectric layer of an integrated circuit having at least two interlevel dielectric layers, each interlevel dielectric layer containing metal wires;

a second resistor comprising a second metal, conductive metal oxide or metal silicide second material, said second material having a second temperature coefficient of resistance, said second temperature coefficient of resistance different from said first temperature coefficient of resistance, said second resistor in said first interlevel dielectric layer of said integrated circuit or in a second interlevel dielectric layer of said integrated circuit, said first resistor and said second resistor electrically connected to each other and electrically coupled to a voltage source by wires formed in said first or said first and second dielectric layers, said wires having a lower resistance than either of said first and second resistors; and

wherein when said first resistor and said second resistor are both in said first interlevel dielectric layer, a bottom surface of said second resistor is in direct physical and electrical contact with a top surface of said first resistor.

2. The structure of claim 1 , wherein, when said second resistor is in said second interlevel dielectric level, said first and second resistors are electrically connected in series with each other with respect to said voltage source.

3. The structure of claim 1 , wherein, when said second resistor is in said second interlevel dielectric level, said first and second resistors are electrically connected in parallel each other with respect to said voltage source.

4. The structure of claim 1 , wherein at least one edge of said first resistor extends past a corresponding edge of said second resistor, a bottom surface of said second resistor is separated from a top surface of said first resistor by an intervening insulating layer and said first and second resistors electrically coupled in series with respect to said voltage source.

5. The structure of claim 1 , wherein said first temperature coefficient of resistance and said second temperature coefficient of resistance have opposite polarities.

6. The structure of claim 1 , wherein said first temperature coefficient of resistance and said second temperature coefficient of resistance have the same polarity and different magnitudes.

7. The structure of claim 1 , wherein said first temperature coefficient of resistance and said second temperature coefficient of resistance have the opposite polarities and about the same magnitude.

8. The structure of claim 1 , wherein said first material and said second material are mutually exclusively selected from the group consisting of CrNi, CrSi, CrTi, CrSnO, SnO 2 , W, Mo, Re, Ta, Ta 2 N, NiCr, NiCrAlCu and Ru.

9. The structure of claim 1 , wherein said metal wires are damascene or dual damascene wires.

10. The structure of claim 1 , further including a third interlevel dielectric layer containing wires interposed between said first interlevel dielectric layer and a substrate of said integrated circuit.

11. A structure comprising:

a first resistor comprising a first metal, conductive metal oxide or metal silicide first material, said first material having a first temperature coefficient of resistance, said first resistor in a first interlevel dielectric layer of an integrated circuit having at least two interlevel dielectric layers, each interlevel dielectric layer containing metal wires;

a second resistor comprising a second metal, conductive metal oxide or metal silicide second material, said second material having a second temperature coefficient of resistance, said second temperature coefficient of resistance different from said first temperature coefficient of resistance, said second resistor in said first interlevel dielectric layer of said integrated circuit or in a second interlevel dielectric layer of said integrated circuit, said first resistor and said second resistor electrically connected to each other and electrically coupled to a voltage source by wires formed in said first or said first and second dielectric layers, said wires having a lower resistance than either of said first and second resistors; and

wherein when said first resistor and said second resistor are both in said first interlevel dielectric layer, at least one edge of said first resistor extends past a corresponding edge of said second resistor, a bottom surface of said second resistor is separated from a top surface of said first resistor by an intervening insulating layer and said first and second resistors electrically coupled in parallel with respect to said voltage source.

12. The structure of claim 11 , wherein, when said second resistor is in said second interlevel dielectric level, said first and second resistors are electrically connected in series with each other with respect to said voltage source.

13. The structure of claim 11 , wherein, when said second resistor is in said second interlevel dielectric level, said first and second resistors are electrically connected in parallel each other with respect to said voltage source.

14. The structure of claim 11 , wherein at least one edge of said first resistor extends past a corresponding edge of said second resistor, a bottom surface of said second resistor is separated from a top surface of said first resistor by an intervening insulating layer and said first and second resistors electrically coupled in series with respect to said voltage source.

15. The structure of claim 11 , wherein said first temperature coefficient of resistance and said second temperature coefficient of resistance have opposite polarities.

16. The structure of claim 11 , wherein said first temperature coefficient of resistance and said second temperature coefficient of resistance have the same polarity and different magnitudes.

17. The structure of claim 11 , wherein said first temperature coefficient of resistance and said second temperature coefficient of resistance have the opposite polarities and about the same magnitude.

18. The structure of claim 11 , wherein said first material and said second material are mutually exclusively selected from the group consisting of CrNi, CrSi, CrTi, CrSnO, SnO 2 , W, Mo, Re, Ta, Ta 2 N, NiCr, NiCrAlCu and Ru.

19. A structure, comprising:

an integrated circuit having at least two interlevel dielectric layers each interlevel dielectric layer containing metal wires;

a first resistor in said integrated circuit, said first resistor comprising a first silicon material, said first material having a first temperature coefficient of resistance;

a second resistor in said integrated circuit, said second resistor comprising a second silicon material, said second material having a second temperature coefficient of resistance, said second temperature coefficient of resistance different than said first temperature coefficient of resistance, said first resistor and said second resistor electrically connected to each other and electrically coupled in series or in parallel with respect to a voltage source

a third resistor comprising a third silicon material, said third resistor on a top surface of an additional dielectric layer, said additional dielectric layer on a top surface of said second resistor, said third resistor is a polysilicon resistor comprising doped polysilicon;

wherein said first resistor is a diffused resistor in a doped region of a single-crystal silicon substrate of said integrated circuit and said first silicon material is doped single-crystal silicon; and

wherein said second resistor is a polysilicon resistor on a top surface of an interlevel dielectric layer of said integrated circuit, said interlevel dielectric layer on a top surface of said doped silicon region and said second silicon material is doped polysilicon.

20. The structure of claim 19 , wherein said first silicon material, said second silicon material and said third silicon material are not the same materials and are independently doped with As, P, B, BF 2 , In, Sb or combinations thereof.

21. The structure of claim 19 , wherein:

said first resistor is a polysilicon resistor on a top surface of a dielectric region of said substrate and said first material is a first doped polysilicon; and

said second resistor is a polysilicon resistor on a top surface of a dielectric layer, said dielectric layer on a top surface of said first resistor and said second material is a second doped polysilicon.

22. The structure of claim 21 , wherein said first silicon material and said second silicon material are not the same material and are independently doped with As, P, B, BF 2 , In, Sb or combinations thereof.

23. The structure of claim 19 , wherein said first temperature coefficient of resistance and said second temperature coefficient of resistance have opposite polarities.

24. The structure of claim 19 , wherein said first temperature coefficient of resistance and said second temperature coefficient of resistance have the same polarity and different magnitudes.

25. The structure of claim 19 , wherein said first temperature coefficient of resistance and said second temperature coefficient of resistance have the different polarities and about the same magnitude.

26. The structure of claim 19 , wherein said first silicon material and said second silicon material are not the same material and are independently doped with As, P, B, BF 2 , In, Sb or combinations thereof.

27. The structure of claim 19 , wherein said metal wires are damascene or dual damascene wires.

28. The structure of claim 19 , wherein a bottom surface of said second resistor is located directly over a top surface of said first resistor.