IP Library Granted Patent US 7,239,255
Granted Patent B2
US 7,239,255 · App. 11/254,070 · Granted Jul 3, 2007

Correcting charge transfer inefficiency in a charge coupled analog to digital converter

Assignee: Kenet, Inc.
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Quick Facts
Patent No.
US 7,239,255
App. No.
11/254,070
Granted
Jul 3, 2007
Kind
B2
Abstract

A technique for correcting charge transfer inefficiencies in a Charge Coupled Device (CCD). The basic approach is to estimate the charge entering at a given stage in a CCD pipeline, and to then determine an estimate of the error introduced by the accumulated leftover charge that will be present at a second point, farther down the pipeline. The error is then corrected by injecting a correcting charge at a third point, farther still down the CCD pipeline. The invention is used, in one embodiment, to correct the output of a charge to digital converter, although principals of the invention may be used for other types of circuits.

Claims (49)

1. A method comprising:

(a) estimating an amount of charge entering at a first selected stage in a multiple stage charge transfer pipeline;

(b) determining an estimate of an accumulative error introduced at a second selected stage, the second selected stage further along the charge pipeline than the first selected stage; and

(c) injecting a correction charge in the pipeline to adjust for the accumulative error, and

wherein the step of (b) determining an estimate of the accumulative error further comprises estimating the accumulative error as a function of a per stage transfer efficiency error and the number of stages between the first selected stage and the second selected stage.

2. A method as in claim 1 wherein the per stage transfer efficiency is estimated as a constant percentage of a corresponding stored charge.

3. A method as in claim 1 wherein the correction charge is injected in the pipeline at a third selected stage which is further along the pipeline than the second selected stage.

4. A method as in claim 1 wherein the multiple stage charge transfer device is a successive approximation charge to digital converter.

5. A method as in claim 4 wherein the charge to digital converter is a differential type charge to digital converter that has a positive “p” side of the pipeline and a minus “m” side of the pipeline, and wherein each side of the pipeline is corrected for accumulative error.

6. A method as in claim 1 wherein the size of the correction charge is fixed.

7. A method comprising:

(a) estimating an amount of charge entering at a first selected stage in a multiple stage charge transfer pipeline;

(b) determining an estimate of an accumulative error introduced at a second selected stage, the second selected stage further along the charge pipeline than the first selected stage; and

(c) injecting a correction charge in the pipeline to adjust for the accumulative error, and

wherein the size of the correction charge is fixed depending upon an expected charge transfer efficiency.

8. A method as in claim 7 wherein the step of injecting a correction charge comprises digitally adjusting the charge pipeline.

9. A method comprising:

(a) estimating an amount of charge entering at a first selected stage in a multiple stage charge transfer pipeline;

(b) determining an estimate of an accumulative error introduced at a second selected stage, the second selected stage further along the charge pipeline than the first selected stage; and

(c) injecting a correction charge in the pipeline to adjust for the accumulative error, and

wherein the step of determining the accumulative error additionally comprises:

applying a predetermined calibration input charge to the first selected stage;

determining an ideal expected charge that should occur at the second selected stage;

measuring an actual measured charge at the second selected stage; and

determining a difference between the ideal expected charge and the actual measured charge.

10. An apparatus comprising:

(a) a first stage charge detector for determining an amount of charge entering at a first selected stage in the charge pipeline;

(b) an accumulative charge error estimator, for estimating an accumulative charge error introduced at a second selected stage in the charge pipeline, the second selected stage further along the charge pipeline than the first selected stage; and

(c) a correction charge injector, for injecting a correction charge in the pipeline to adjust the accumulative charge error for charge transfer inefficiency;

wherein the accumulative charge error estimator produces an accumulative charge error that is a function of a per stage transfer efficiency error and the number of stages between the first selected stage and the second selected stage.

11. An apparatus as in claim 10 wherein accumulative charge error estimator further estimates the per stage transfer efficiency as a constant percentage of a corresponding stored charge.

12. An apparatus as in claim 10 wherein the correction charge injector is coupled to the charge pipeline at a third selected stage which is further along the pipeline than the second selected stage.

13. An apparatus as in claim 10 wherein the multiple stage charge transfer device is a successive approximation charge to digital converter.

14. An apparatus as in claim 13 wherein the charge to digital converter is a differential charge to digital converter that has a positive “p” side of the pipeline and a minus “m” side of the pipeline, and wherein each side of the pipeline is corrected for accumulative error.

15. An apparatus as in claim 10 wherein the size of the correction charge is fixed.

16. An apparatus comprising:

(a) a first stage charge detector for determining an amount of charge entering at a first selected stage in the charge pipeline;

(b) an accumulative charge error estimator, for estimating an accumulative charge error introduced at a second selected stage in the charge pipeline, the second selected stage further along the charge pipeline than the first selected stage; and

(c) a correction charge injector, for injecting a correction charge in the pipeline to adjust the accumulative charge error for charge transfer inefficiency

wherein the size of the correction charge is fixed depending upon the expected charge transfer efficiency.

17. An apparatus as in claim 15 wherein the correction charge injector digitally adjusts digital output values from the pipeline.

18. An apparatus comprising:

(a) a first stage charge detector for determining an amount of charge entering at a first selected stage in the charge pipeline;

(b) an accumulative charge error estimator, for estimating an accumulative charge error introduced at a second selected stage in the charge pipeline, the second selected stage further along the charge pipeline than the first selected stage; and

(c) a correction charge injector, for injecting a correction charge in the pipeline to adjust the accumulative charge error for charge transfer inefficiency,

wherein the accumulative error estimator further comprises:

a calibration input circuit, arranged to couple a predetermined calibration input charge to the first selected stage;

a detector, for measuring an actual measured charge at the second selected stage; and

a difference detector, for determine a difference between an ideal expected charge and the actual measured charge.

Assignments (3)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 26, 2017
From: KENET LLC
To: INTERSIL AMERICAS LLC
Reel/Frame 042515/0332 →
CHANGE OF NAME Recorded May 26, 2017
From: KENET, INC.
To: KENET LLC
Reel/Frame 042594/0987 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jan 9, 2006
From: KURTZE, JEFFERY D.; ANTHONY, MICHAEL P.
To: KENET, INC.
Reel/Frame 017437/0992 →
Continuity (1)
Related Publication 20070085724A1 · Apr 19, 2007