IP Library Granted Patent US 7,242,087
Granted Patent B2
US 7,242,087 · App. 11/058,810 · Granted Jul 10, 2007

Flexible printed circuit board

Assignee: Alps Electric Co., Ltd.
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Quick Facts
Patent No.
US 7,242,087
App. No.
11/058,810
Granted
Jul 10, 2007
Kind
B2
Abstract

A flexible printed circuit board includes a substrate layer composed of insulating material, a protection circuit of a thin-film capacitor element, the protection circuit including a first wiring layer on the substrate layer, a dielectric layer, and a counter electrode layer. At least a portion of each of the first wiring layer and the counter electrode layer serves as a terminal. The front surface of each of the first wiring layer and the counter electrode layer, except the terminal portion, is covered with an insulating coating.

Claims (33)

1. A flexible printed circuit (FPC) board comprising:

a substrate layer composed of insulating material;

a first wiring layer on the front surface of the substrate layer;

a second wiring layer on the back surface of the substrate layer;

at least one dielectric layer;

at least one counter electrode layer;

a first interlayer connector connecting to the counter electrode layer on the back surface of the substrate layer and to the first wiring layer through the substrate layer;

a second interlayer connector connecting to the counter electrode layer on the back surface of the substrate layer through the substrate layer;

a third interlayer connector connecting to the second wiring layer through the substrate layer; and

an element chip on the front surface of the substrate layer, the element chip including a resin mold segment and connectors on the lower surface of the resin mold segment, the connectors connecting to the second interlayer connector and to the third interlayer connector, respectively,

wherein

a stack of a dielectric layer, a counter electrode layer, and the first wiring layer, and/or a stack of a dielectric layer, a counter electrode layer, and the second wiring layer defines a protection circuit of a thin-film capacitor element,

at least a portion of each of the first wiring layer, the second wiring layer, and the counter electrode layer serves as a terminal,

each of the first wiring layer, the second wiring layer, and the counter electrode layer, except the terminal portion, is covered with an insulating coating, and

wherein

the dielectric layer and the counter electrode layer are sandwiched between the second wiring layer and the substrate layer.

2. The FPC board according to claim 1 , further comprising:

a first terminal connecting to the second interlayer connector; and a second terminal connecting to the third interlayer connector, the first terminal and the second terminal being provided on the front surface of the substrate layer so as to be separated from each other and to be disposed within edges of the resin mold segment of the element chip to connect to the element chip.

3. An FPC board comprising:

a substrate layer composed of insulating material;

a protection circuit of a thin-film capacitor element, the protection circuit including

a first wiring layer on the substrate layer;

a dielectric layer on the first wiring layer; and

a counter electrode layer on the dielectric layer; and

an element chip including a connector and a resin mold segment,

wherein

at least a portion of each of the first wiring layer and the counter electrode layer serves as a terminal,

the front surface of each of the first wiring layer and the counter electrode layer, except the terminal portion, is covered with an insulating coating, and

wherein

the connector is connected to the terminal of the first wiring layer; and

the first wiring layer, the dielectric layer, and the counter electrode layer are disposed within edges of the resin mold segment.

4. The FPC board according to claim 3 , further comprising:

wiring lines in the first wiring layer, the wiring lines connecting the first wiring layer to other electrical circuits.

Assignments (2)
RECORD TO CORRECT THE 3RD CONVEYING PARTY'S NAME, PREVIOUSLY RECORDED AT REEL 016281 FRAME 0388. Recorded Oct 30, 2008
From: NAKANO, AKIRA; TSUJI, YOSHIOMI; HIGA, YOSHINARI
To: ALPS ELECTRIC CO., LTD.
Reel/Frame 021924/0151 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Feb 15, 2005
From: NAKANO, AKIRA; TSUJI, YOSHIOMI; HIAGA, YOSHINARI
To: ALPS ELECTRIC CO., LTD.
Reel/Frame 016281/0388 →
Priority Claims (1)
JP 2004-051868 · Feb 26, 2004 · national
Continuity (1)
Related Publication 20050189645A1 · Sep 1, 2005