IP Library Granted Patent US 7,264,976
Granted Patent B2
US 7,264,976 · App. 11/064,452 · Granted Sep 4, 2007

Advance ridge structure for microlens gapless approach

Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
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Quick Facts
Patent No.
US 7,264,976
App. No.
11/064,452
Granted
Sep 4, 2007
Kind
B2
Abstract

A method of manufacturing a plurality of microlenses on a substrate comprises forming a grid having raised ridges defining a plurality of openings on the substrate and forming a plurality of patterned photoresist features each disposed within one of the plurality of openings. The plurality of patterned photoresist features can then be reflowed inside the grid.

Claims (63)

1. A method of manufacturing a plurality of microlenses on a substrate, comprising:

providing a substrate having a plurality of photo sensors formed therein;

forming a passivation layer on the substrate and the plurality of photo sensors;

forming a dielectric layer on the passivation layer, the dielectric layer comprising a multilayer structure including a planarization layer, a polymeric color filter layer, and a spacer layer;

forming a photoresist pattern on the dielectric layer, wherein the photoresist pattern comprises a wall structure having a plurality of walls each having a width ranging between about 0.2 μm and 0.25 μm, and wherein forming the photoresist pattern includes:

depositing a first photoresist layer on the dielectric layer;

pre-baking the first photoresist layer;

exposing the pre-baked first photoresist layer;

post-baking the pre-baked and exposed first photoresist layer;

developing the pre-baked, exposed and post-baked first photoresist layer; and

hard-baking the pre-baked, exposed, post-baked and developed first photoresist layer;

removing portions of the dielectric layer via wet and dry etching utilizing the photoresist pattern to form a dielectric grid between the photoresist pattern and a remaining portion of the dielectric layer, wherein the dielectric grid is composed of a plurality of raised ridges each having a width less than the width of a vertically-adjacent wall of the photoresist pattern wall structure and each defining an opening comprising an exposed area of the remaining portion of the dielectric layer;

removing the photoresist pattern via plasma ashing and wet stripping;

forming a plurality of photoresist features, wherein one of the raised ridges of the dielectric grid interposes each neighboring pair of the plurality of photoresist features, wherein each of a plurality of gaps separates each raised ridge of the dielectric grid from a neighboring one of the plurality of photoresist features, and wherein forming the plurality of photoresist features includes:

depositing a second photoresist layer on the dielectric grid and the exposed areas of the remaining portion of the dielectric layer;

pre-baking the second photoresist layer;

exposing the pre-baked second photoresist layer;

post-baking the pre-baked and exposed second photoresist layer;

developing the pre-baked, exposed and post-baked second photoresist layer; and

hard-baking the pre-baked, exposed, post-baked and developed second photoresist layer; and

thermal reflowing the plurality of photoresist features at a temperature ranging between about 70° C. and about 140° C. to form a plurality of microlenses, wherein each of the plurality of microlenses has a convex upper surface having a thickness at its center ranging between about 0.5 μm and about 0.7 μm.

2. A method of manufacturing a plurality of microlenses on a substrate, comprising:

providing a substrate having a plurality of photo sensors formed therein;

forming a passivation layer on the substrate and the plurality of photo sensors;

forming a dielectric layer on the passivation layer, the dielectric layer having a dielectric constant no greater than about 3.9;

forming a photoresist pattern on the dielectric layer, wherein the photoresist pattern comprises a wall structure having a plurality of walls each having a width ranging between about 0.2 μm and 0.25 μm, and wherein forming the photoresist pattern includes:

depositing a first photoresist layer on the dielectric layer;

pre-baking the first photoresist layer;

exposing the pre-baked first photoresist layer;

post-baking the pre-baked and exposed first photoresist layer;

developing the pre-baked, exposed and post-baked first photoresist layer; and

hard-baking the pre-baked, exposed, post-baked and developed first photoresist layer;

removing portions of the dielectric layer via wet and dry etching utilizing the photoresist pattern to form a dielectric grid between the photoresist pattern and a remaining portion of the dielectric layer, wherein the dielectric grid is composed of a plurality of raised ridges each having a width less than the width of a vertically-adjacent wall of the photoresist pattern wall structure and each defining an opening comprising an exposed area of the remaining portion of the dielectric layer;

removing the photoresist pattern via plasma ashing and wet stripping;

forming a plurality of photoresist features, wherein one of the raised ridges of the dielectric grid interposes each neighboring pair of the plurality of photoresist features, wherein each of a plurality of gaps separates each raised ridge of the dielectric grid from a neighboring one of the plurality of photoresist features, and wherein forming the plurality of photoresist features includes:

depositing a second photoresist layer on the dielectric grid and the exposed areas of the remaining portion of the dielectric layer;

pre-baking the second photoresist layer;

exposing the pre-baked second photoresist layer;

post-baking the pre-baked and exposed second photoresist layer;

developing the pre-baked, exposed and post-baked second photoresist layer; and

hard-baking the pre-baked, exposed, post-baked and developed second photoresist layer; and

thermal reflowing the plurality of photoresist features at a temperature ranging between about 70° C. and about 140° C. to form a plurality of microlenses, wherein each of the plurality of microlenses has a convex upper surface having a thickness at its center ranging between about 0.5 μm and about 0.7 μm.

3. A method of manufacturing a plurality of microlenses on a substrate, comprising:

providing a substrate having a plurality of photo sensors formed therein;

forming a passivation layer on the substrate and the plurality of photo sensors;

forming a dielectric layer on the passivation layer;

forming a photoresist pattern on the dielectric layer, wherein the photoresist pattern comprises a wall structure having a plurality of walls, and wherein forming the photoresist pattern includes:

depositing a first photoresist layer on the dielectric layer;

pre-baking the first photoresist layer;

exposing the pre-baked first photoresist layer;

post-baking the pre-baked and exposed first photoresist layer;

developing the pre-baked, exposed and post-baked first photoresist layer; and

hard-baking the pre-baked, exposed, post-baked and developed first photoresist layer;

removing portions of the dielectric layer via wet and dry etching utilizing the photoresist pattern to form a dielectric grid between the photoresist pattern and a remaining portion of the dielectric layer, wherein the dielectric grid is composed of a plurality of raised ridges each having a width less than the width of a vertically-adjacent wall of the photoresist pattern wall structure and each defining an opening comprising an exposed area of the remaining portion of the dielectric layer;

removing the photoresist pattern via plasma ashing and wet stripping;

forming a plurality of photoresist features, wherein one of the raised ridges of the dielectric grid interposes each neighboring pair of the plurality of photoresist features, wherein each of a plurality of gaps separates each raised ridge of the dielectric grid from a neighboring one of the plurality of photoresist features, and wherein forming the plurality of photoresist features includes:

depositing a second photoresist layer on the dielectric grid and the exposed areas of the remaining portion of the dielectric layer;

pre-baking the second photoresist layer;

exposing the pre-baked second photoresist layer;

post-baking the pre-baked and exposed second photoresist layer;

developing the pre-baked, exposed and post-baked second photoresist layer; and

hard-baking the pre-baked, exposed, post-baked and developed second photoresist layer; and

thermal reflowing the plurality of photoresist features to form a plurality of microlenses each having a convex upper surface.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Feb 23, 2005
From: DENG, JACK; KUO, CHIN CHEN; WENG, FU-TIEN; CHANG, CHIH-KUNG; CHANG, BII-JUNQ
To: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
Reel/Frame 016321/0370 →
Continuity (1)
Related Publication 20060189062A1 · Aug 24, 2006