IP Library › Granted Patent US 7,282,413
Granted Patent B2
US 7,282,413 · App. 11/318,501 · Granted Oct 16, 2007

Semiconductor device including nonvolatile memory and method for fabricating the same

Assignee: Kabushiki Kaisha Toshiba
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Quick Facts
Patent No.
US 7,282,413
App. No.
11/318,501
Granted
Oct 16, 2007
Kind
B2
Abstract

A semiconductor device including a nonvolatile memory and the fabrication method of the same is described formed on a semiconductor substrate. According to the semiconductor device, a second gate electrode film is used for a gate electrode film of a logic circuit, and for a control gate electrode film of a nonvolatile memory. As the second gate electrode film is formed at a relatively later step in fabrication, subsequent thermal process may be avoided. The gate structure is suitable for miniaturization of the transistor in the logic circuit.

Claims (35)

1. A method for fabricating a semiconductor device, comprising:

forming an element isolation area surrounding an element area in a semiconductor substrate;

forming a first gate insulating film on the element area;

forming a first gate electrode film on the first gate insulating film;

removing selectively the first gate electrode film and the first gate insulating film on a nonvolatile memory cell region in the element area;

forming a second gate insulating film on the first gate electrode film;

removing the second gate insulating film, the first gate electrode film and the first gate insulating film, respectively, on a logic circuit region in the element area;

forming a third gate insulating film on the semiconductor substrate in the logic circuit region;

forming a second gate electrode film on the second gate insulating film and the third gate insulating film;

removing selectively the second gate electrode film, the second gate insulating film and the first gate electrode film in the nonvolatile memory cell region, and removing selectively the second gate electrode film in the logic circuit region; and

forming a source and a drain in the semiconductor substrate to interpose a surface region of the semiconductor substrate beneath the first gate insulating film and the third gate insulating film, by introducing impurities into the semiconductor substrate using the second gate electrode film as a mask.

2. A method for fabricating a semiconductor device, according to claim 1 , further comprising

forming a metal-silicide film on the second gate electrode film, the source and the drain.

3. A method for fabricating a semiconductor device, comprising

forming an element isolation area surrounding an element device area in a semiconductor substrate;

forming a first gate insulating film on the element area;

forming a first gate electrode film on the first gate insulating film;

removing selectively the first gate electrode film and the first gate insulating film on a nonvolatile memory cell region in the element area;

forming a second gate insulating film on the first gate electrode film;

removing the second gate insulating film, the first gate electrode film and the first gate insulating film, respectively, on a logic circuit region in the element area;

forming a third gate insulating film on the semiconductor substrate in the logic circuit region; forming a second gate electrode film on the second gate insulating film and the third gate insulating film;

removing selectively the second gate electrode film and the second gate insulating film in the nonvolatile memory cell region;

forming a third gate electrode film on the second gate electrode film in the nonvolatile memory cell region and the logic circuit region;

removing selectively the third gate electrode film, the second gate electrode film and the second gate insulating film in the nonvolatile memory cell region, and removing selectively the third gate electrode film and the second gate electrode film in the logic circuit region; and

forming a source and a drain in the semiconductor substrate to interpose a surface region of the semiconductor substrate beneath the first gate insulating film and the third gate insulating film, by introducing impurities into the semiconductor substrate using the third gate electrode film and the second gate electrode film as a mask.

4. A method for fabricating a semiconductor device, according to claim 3 , further comprising

forming an ultra-thin gate insulating film between removing the second gate electrode film and the second gate insulating film selectively and forming the third gate electrode film.

5. A method for fabricating a semiconductor device, according to claim 3 , further comprising

forming a metal-silicide film on the third gate electrode film, the source and the drain.

6. A method for fabricating a semiconductor device, according to claim 1 , wherein

a CMOS logic circuit is formed in the logic circuit by introducing selectively p-type and n-type impurities into the source and the drain in the semiconductor substrate.

7. A method for fabricating a semiconductor device, according to claim 3 , wherein

the third gate insulating film comprises a plurality of insulating films having different insulating film thickness, respectively.

8. A method for fabricating a semiconductor device, according to claim 7 , wherein

forming the third gate insulating film includes forming a first insulating film having a first insulating film thickness on the semiconductor substate, removing the first insulating film on a first portion of the semiconductor substrate, forming on the first portion of the semiconductor substrate, a second insulating film having a second insulating film thickness less than the first insulating film thickness, removing the second insulating film on a second portion of the semiconductor substrate and forming on the second portion of the semiconductor substrate a third insulating film having a third insulating film thickness less than the first and second insulating film thicknesses.

Priority Claims (1)
JP 2003-188889 · Jun 30, 2003 · national
Continuity (2)
Division 1074547700 · Dec 29, 2003
Related Publication 20060102950A1 · May 18, 2006