IP Library › Granted Patent US 7,286,104
Granted Patent B2
US 7,286,104 · App. 10/484,659 · Granted Oct 23, 2007

Method and device for gamma correction

Assignee: Koninklijke Philips Electronics N.V.
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Quick Facts
Patent No.
US 7,286,104
App. No.
10/484,659
Granted
Oct 23, 2007
Kind
B2
Abstract

A display device, such as an electroluminescent display device, includes a matrix of pixels, each pixel being driven by a drive pulse that is pulse width modulated. The width of the drive pulse is controlled by a gamma correction device, in which gamma correction information is supplied in the form of a separate pulse distribution-modulated signal.

Claims (28)

1. A method of gamma correction for use in a display device that includes a matrix of pixels, each pixel being driven by a drive pulse that is pulse width modulated, the method comprising:

generating a pulse distribution-modulated signal, in which the pulse distribution is dependent on pre-determined gamma correction information,

deriving a grey level information about each pixel from an input signal, and

comparing the grey level information with a counter information based on the pulse distribution-modulated signal, in order to obtain a gamma-corrected width of the drive pulse.

2. The method of claim 1 , further including:

generating a pulse count based on the pulse distribution-modulated signal, and

comparing the grey level information and the pulse count to provide a comparison output, and

controlling the drive pulse to the pixel based on the comparison output.

3. The method of claim 1 , wherein generating the pulse distribution-modulated signal includes:

storing timing distribution information values for the pulse distribution-modulated signal,

comparing the stored timing distribution information values to a clocked counter value,

outputting a signal pulse when each stored timing distribution value equals the clocked counter value,

combining the signal pulses to form the pulse distribution modulated signal.

4. The method of claim 3 , wherein the stored timing distribution values and the clocked counter value include a larger number of bits than the counter information and the grey level information.

5. A display device, comprising

a matrix of display pixels, each pixel being driven by a drive pulse which is pulse width modulated, and

a gamma correction device that is configured to control a width of the drive pulse based on a pulse distribution-modulated signal that is dependent on predetermined gamma correction information.

6. The display device of claim 5 , wherein the gamma correction device includes a first block that is configured to generate the pulse distribution-modulated signal, and a second block that is configured to receive the pulse distribution-modulated signal and to generate the drive pulse based on the pulse distribution-modulated signal.

7. The display device of claim 6 , wherein the first block includes:

a plurality of gamma registers that are configured to store timing distribution information values for the pulse distribution-modulated signal,

a plurality of gamma level comparators, each register being connected to a first input of a respective one of the plurality of gamma level comparators, a counter value from a clock counter being arranged to be inputted into a second input of each gamma level comparator, whereby a signal pulse from any one of the gamma level comparators is arranged to be outputted when the value stored in the respective one of the gamma registers equals the inputted clock counter value, and

an OR-component that is configured to receive the outputted signal pulses and to provide therefrom the pulse distribution-modulated signal.

8. The display device of claim 6 , wherein the second block includes:

a pulse counter that is configured to receive the pulse distribution-modulated signal from the first block,

a grey level register that is configured to receive a grey level to be displayed,

a grey level comparator that is configured to compare outputs of the pulse counter and the grey level, and

a switch that is configured to control the drive pulse based on an output of the grey level comparator.

9. The display device of claim 8 , including a set-reset flip-flop that is configured to control the switch based on the output of the grey level comparator, and is configured to be reset each line period.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jan 23, 2004
From: SEMPEL, ADRIANUS; SNIJDER, PIETER JACOB; LOS, REMCO
To: KONINKLIJKE PHILIPS ELECTRONICS N.V.
Reel/Frame 015364/0632 →
Priority Claims (1)
EP 01202918 · Aug 1, 2001 · regional
Continuity (1)
Related Publication 20040174388A1 · Sep 9, 2004