IP Library › Granted Patent US 7,294,572
Granted Patent B2
US 7,294,572 · App. 11/164,480 · Granted Nov 13, 2007

Method of forming contact

Assignee: United Microelectronics Corp.
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Quick Facts
Patent No.
US 7,294,572
App. No.
11/164,480
Granted
Nov 13, 2007
Kind
B2
Abstract

A method of forming a contact is provided. A substrate having at least two conductive devices is provided. A spacing is located between the two conductive devices. A first dielectric layer is formed over the substrate to cover the two conductive devices and the spacing. A seam is formed in the first dielectric layer within the spacing. Then, a portion of the first dielectric layer is removed to form an opening so that the width of the seam is expanded. A second dielectric layer is formed over the first dielectric layer to fill the opening. A portion of the second dielectric layer and a portion of the first dielectric layer within the spacing are removed until a portion of the surface of the substrate is exposed and a contact opening is formed in the location for forming the contact. Finally, conductive material is deposited to fill the contact opening.

Claims (34)

1. A method of forming a contact, comprising:

providing a substrate having at least two conductive devices, wherein a spacing is located between the two conductive devices;

forming a first dielectric layer over the substrate to cover the two conductive devices and fill the spacing, wherein the first dielectric layer within the spacing has a seam;

forming a pothoresist layer over the first dielectric layer;

performing a photolithographic process to form a patterned photoresist layer that exposes the seam in the first dielectric layer;

etching a portion of the first dielectric layer using the patterned photoresist layer as a mask to form an opening so as to expand the width of the seam;

removing the patterned photoresist layer;

forming a second dielectric layer over the first dielectric layer to fill the opening;

removing a portion of the second dielectric layer and a portion of the first dielectric layer inside the spacing until a portion of the surface of the substrate is exposed so that a contact opening is formed in a location that corresponds to the opening; and

filling a conductive layer into the contact opening.

2. The method of claim 1 , wherein the material constituting the first dielectric layer comprises silicon nitride.

3. The method of claim 1 , wherein the first dielectric layer has a thickness between 100 Å to 2000 Å.

4. The method of claim 1 , wherein the first dielectric layer has a thickness between 500 Å to 1500 Å.

5. The method of claim 1 , wherein the first dielectric layer has a thickness of 1000 Å.

6. The method of claim 1 , wherein before forming the photoresist layer further comprises forming a bottom anti-reflective coating layer over the first dielectric layer.

7. The method of claim 1 , wherein the material constituting the second dielectric layer comprises silicon oxide, phosphosilicate glass, borosilicate glass, borophosphosilicate glass or undoped silicate glass/phosphorus glass.

8. A method of forming a contact, comprising:

providing a substrate having at least two metal-oxide-semiconductor (MOS) transistors, wherein a spacing is located between the two MOS transistors;

forming a stress layer over the substrate to cover the two MOS transistors and fill the spacing, wherein the stress layer within the spacing has a seam;

forming a photoresist layer over the stress layer;

performing a photolithographic process to form a patterned photoresist layer that exposes the seam in the stress layer;

etching a portion of the stress layer using the patterned photoresist layer as a mask to form an opening so as to expand the width of the seam;

removing the patterned photoresist layer;

forming a dielectric layer over the stress layer to fill the opening;

removing a portion of the dielectric layer and a portion of the stress layer within the spacing until a portion of the surface of the substrate is exposed to form a contact opening in a position that corresponds to the opening; and

filling a conductive layer into the contact opening.

9. The method of claim 8 , wherein the material constituting the stress layer comprises silicon nitride.

10. The method of claim 8 , wherein the stress layer has a stress between 1 to 50 GPa.

11. The method of claim 8 , wherein the stress layer has a stress between 1 to 10 GPa.

12. The method of claim 8 , wherein the stress layer has a thickness between 100 Å to 2000 Å.

13. The method of claim 8 , wherein the stress layer has a thickness between 500 Åto 1500 Å.

14. The method of claim 8 , wherein the stress layer has a thickness of 1000 Å.

15. The method of claim 8 , wherein before forming the photoresist layer further comprises forming a bottom anti-reflective coating layer over the stress layer.

16. The method of claim 8 , wherein the material constituting the dielectric layer comprises silicon oxide, phosphosilicate glass, borosilicate glass, borophosphosilicate glass or undoped silicate glass/phosphorus glass.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Nov 24, 2005
From: YANG, CHAN-LON; CHEN, NENG-KUO; TSAI, TENG-CHUN; HUANG, CHIEN-CHUNG; HSU, SHAO-TA
To: UNITED MICROELECTRONICS CORP.
Reel/Frame 016812/0815 →
Continuity (1)
Related Publication 20070117375A1 · May 24, 2007