IP Library Granted Patent US 7,327,554
Granted Patent B2
US 7,327,554 · App. 10/801,867 · Granted Feb 5, 2008

Assembly of semiconductor device, interposer and substrate

Assignee: NGK Spark Plug Co., Ltd.
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Quick Facts
Patent No.
US 7,327,554
App. No.
10/801,867
Granted
Feb 5, 2008
Kind
B2
Abstract

An assembly includes a semiconductor device having surface-connecting terminals, a substrate having surface-connecting pads, and a capacitor having an approximately plate-shaped capacitor main body having a first surface on which the semiconductor device is mounted and a second surface at which the capacitor main body is mounted on the substrate and a plurality of electrically conductive vias penetrating the capacitor main body between the first and second surfaces and connected to the surface-connecting terminals and the surface-connecting pads.

Claims (25)

1. A capacitor equipped substrate assembly comprising:

a substrate having surface-connecting pads; and

a capacitor having an approximately plate-shaped capacitor main body having a first surface and a second surface at which the capacitor is mounted on the substrate and a plurality of electrically conductive vias penetrating the capacitor main body between the first and second surfaces and connected to the surface-connecting pads,

wherein the thermal expansion coefficient of the capacitor main body is smaller than that of the substrate.

2. An assembly comprising:

a semiconductor device having surface-connecting terminals;

a substrate having surface-connecting pads; and

a capacitor having an approximately plate-shaped capacitor main body having a first surface on which the semiconductor device is mounted and a second surface at which the capacitor main body is mounted on the substrate and a plurality of electrically conductive vias penetrating the capacitor main body between the first and second surfaces and connected to the surface-connecting terminals and the surface-connecting pads,

wherein the thermal expansion coefficient of the capacitor main body is smaller than that of the substrate.

3. An interposer comprising:

an interposer main body having a first surface on which a semiconductor device having surface-connecting terminals is mounted and a second surface formed with a recess;

a plurality of interposer main body side electrically conductive vias penetrating the interposer main body between the first surface and a bottom surface of the recess and connected to the surface-connecting terminals; and

a capacitor disposed in the recess and having front and rear surfaces and a plurality of capacitor side electrically conductive vias passing through the front and rear surfaces and connected to the interposer main body side electrically conductive vias.

4. An interposer according to claim 3 , further comprising, within the interposer main body, a plurality of short electrically conductive ground vias passing through the first surface and an electrically conductive via pitch changing layer, at least a part of the short electrically conductive ground vias being electrically connected to ground vias of the capacitor side electrically conductive vias by way of the electrically conductive via pitch-changing layer.

5. An interposer according to claim 3 , further comprising, within the interposer main body, a plurality of short electrically conductive power vias passing through the first surface and an electrically conductive via pitch-changing layer, at least a part of the short electrically conductive power vias being electrically connected to power vias of the capacitor side electrically conductive vias by way of the electrically conductive via pitch-changing layer.

6. A semiconductor device equipped interposer assembly comprising:

a semiconductor device having surface-connecting terminals; and

an interposer having an approximately plate-shaped interposer main body having a first surface on which the semiconductor device having surface-connecting terminals is mounted and a second surface formed with a recess, a plurality of interposer main body side electrically conductive vias penetrating the interposer main body between the first surface and a bottom surface of the recess and connected to the surface-connecting terminals, and a capacitor disposed in the recess and having front and rear surfaces and a plurality of capacitor side electrically conductive vias extending through the front and rear surfaces and connected to the interposer main body side electrically conductive vias.

7. An interposer equipped substrate assembly comprising:

a substrate having surface-connecting terminals; and

an interposer having an approximately plate-shaped interposer main body having a first surface and a second surface formed with a recess, the interposer main body being mounted at the second surface on the substrate, the interposer further having a plurality of interposer main body side electrically conductive vias penetrating the interposer main body between the first and second surfaces and connected to the surface-connecting terminals and a capacitor disposed in the recess and having front and rear surfaces and a plurality of capacitor side electrically conductive vias passing through the front and rear surfaces and connected to the interposer main body side electrically conductive vias.

8. An assembly comprising:

a semiconductor device having surface-connecting terminals;

a substrate having surface-connecting pads; and

an interposer having an approximately plate-shaped interposer main body having a first surface on which the semiconductor device is mounted and a second surface formed with a recess, the interposer main body being mounted at the second surface on the substrate, the interposer further having a plurality of interposer main body side electrically conductive vias penetrating the interposer main body between the first surface and a bottom surface of the recess and connected to the surface-connecting terminals and a capacitor disposed in the recess and having front and rear surfaces and a plurality of capacitor side electrically conductive vias passing through the front and rear surfaces and connected to the interposer main body side electrically conductive vias and the surface connecting pads.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Mar 17, 2004
From: OTSUKA, JUN; SATO, MANABU; ITO, JUNICHI; HAYASHI, KAZUHIRO; SATO, MOTOHIKO
To: NGK SPARK PLUG CO., LTD.
Reel/Frame 015107/0119 →
Priority Claims (3)
JP 2003-076536 · Mar 19, 2003 · national
JP 2003-199234 · Jul 18, 2003 · national
JP 2003-432369 · Dec 26, 2003 · national
Continuity (1)
Related Publication 20040184219A1 · Sep 23, 2004