Resolver digital converter
View Patent ↗In a resolver digital converter comprising a resolver, a resolver digital conversion part, and an excitation signal generation part, the resolver digital converter for inputting an excitation signal generated in the excitation signal generation part to the resolver and inputting resolver signals outputted from the resolver to the resolver digital conversion part, a locus in which amplitude of a sine component signal among the resolver signals sin(θ), cos(θ) outputted from the resolver is plotted as the ordinate axis and amplitude of a cosine component signal is plotted as the abscissa axis is approximated by a polygon and when the locus matches with sides of the approximated polygon, it is determined that the resolver is in a normal state and when the locus does not match, it is determined that the resolver is in a failure state.
1. A resolver digital converter comprising:
an excitation signal generation pan for generating an excitation signal;
a resolver for receiving the excitation signal generated in the excitation signal generation part and generating resolver signals;
a resolver digital conversion pan for receiving the resolver signals outputted from the resolver, and detecting a failure of the resolver or the resolver digital conversion part; and
a microcomputer having an A/D converter for converting the resolver signals outputted from the resolver into a digital value;
wherein, based on the digital value outputted from the A/D converter, the microcomputer approximates a locus in which amplitude of a sine component signal among the resolver signals outputted from the resolver is plotted as the ordinate axis and amplitude of a cosine component signal is plotted as the abscissa axis by a regular n-sided polygon, wherein n is multiples of 4, and detects the failure of the resolver or the resolver digital conversion part such that when said locus matches with sides of the approximated regular n-sided polygon, it is determined that the resolver or the resolver digital conversion part is in a normal state and when the locus does not match, it is determined that the resolver or the resolver digital conversion part is in a failure state.
2. A resolver digital converter comprising:
an excitation signal generation part for generating an excitation signal;
a resolver for receiving the excitation signal generated in the excitation signal generation part and generating resolver signals;
a resolver digital conversion pan for receiving the resolver signals outputted from the resolver, and detecting a failure of the resolver or the resolver digital conversion part; and
a microcomputer having an A/D converter for converting the resolver signals outputted from the resolver into a digital value;
wherein, based on the digital value outputted from the A/D converter, the microcomputer approximates a locus in which amplitude of a sine component signal among the resolver signals outputted from the resolver is plotted as the ordinate axis and amplitude of a cosine component signal is plotted as the abscissa axis by a regular n-sided polygon, wherein n is multiples of 4, and detects the failure of the resolver or the resolver digital conversion part such that when said locus is present within a region having a predetermined range about sides of the approximated regular n-sided polygon, it is determined that the resolver or the resolver digital conversion part is in a normal state and when the locus does not match, it is determined that the resolver is in a failure state.
3. A resolver digital converter as claimed in claim 2 , wherein when the locus is present within a first region having a first predetermined range about sides of the approximated polygon, it is determined that the resolver is in a normal state and when the locus does not match with the first region having the first predetermined range about the sides of the approximated polygon and the locus is present within a second region having a second predetermined range larger than the first range about the sides of the polygon and time for which the locus deviates from the first region is shorter than a predetermined time, it is determined that the resolver is in a normal state.
4. A resolver digital convener as claimed in claim 3 , wherein when the locus does not match with a first region having a first predetermined range about sides of the approximated polygon and the locus is present within a second region having a second predetermined range larger than the first range about the sides of the polygon and time for which the locus deviates from the first region is longer than a predetermined time, it is determined that the resolver is in a failure state and when the locus does not match with the first region having the first predetermined range about the sides of the approximated polygon and the locus deviates from the second region having the second predetermined range larger than the first range about the sides of the polygon, it is determined that the resolver or the resolver digital conversion part is in a failure state.
5. A resolver digital converter as in claim 1 , further comprising:
a conversion trigger generation part for receiving the excitation signal outputted from the excitation signal generation part and generating and outputting a conversion trigger signal;
an wherein the A/D converter converts the resolver signals outputted from the resolver into a digital value by the conversion trigger signal outputted from the conversion trigger generation part.
6. A resolver digital converter as in claim 2 , further comprising:
a conversion trigger generation part for receiving the excitation signal outputted from the excitation signal generation part and generating and outputting a conversion trigger signal;
wherein the A/D converter converts the resolver signals outputted from the resolver into a the digital value by the conversion trigger signal outputted from the conversion trigger generation part.