Load recognition and series arc detection using load current/line voltage normalization algorithms

1. A method of determining whether arcing is present in an electrical circuit comprising:

sensing a change in current in the circuit and developing a corresponding input signal;

analyzing the input signal to determine the presence of broadband noise in a predetermined range of frequencies, and producing a corresponding output signal;

determining a type of load connected to the electrical circuit, based at least in part upon the input signal and the output signal;

incrementing one or more of a plurality of counters in a predetermined fashion in accordance with the input signal and the output signal and determining whether an arcing fault is present based at least in part on the states of one or more of a plurality of counters; and

decrementing one or more of the plurality of counters based upon a secondary analysis.

2. The method of claim 1 wherein the secondary analysis comprises measuring a distance between each of a plurality of half cycles of the input signal and comparing the distances between each of the plurality of half cycles.

3. The method of claim 2 wherein the secondary analysis further comprises decrementing one or more of the plurality of counters if the distance between each of the plurality of half cycles is the same.

4. The method of claim 1 wherein the secondary analysis comprises detecting a direction of movement of a maximum rise and comparing the direction of movement of a lower phase angle.

5. The method of claim 4 wherein the secondary analysis further comprises decrementing one or more of the plurality of counters if the direction of the rise and the direction of movement due to the sweep of the dimmer switch is the same.

6. The method of claim 1 wherein the secondary analysis comprises normalizing a voltage and a load current.

7. The method of claim 6 wherein the normalizing comprises:

obtaining a first voltage, a first load current corresponding to the first voltage, a second voltage, and a second load current corresponding to the second voltages; and

multiplying the first voltage by the second load current and multiplying the second voltage by the first load current.

8. The method of claim 7 wherein, in response to the product of the first voltage and the second load current being the same as the product of the second voltage and the first load current, the secondary analysis includes decrementing one or more of the plurality of counters.

9. The method of claim 1 wherein the secondary analysis comprises:

measuring a plurality of load current areas;

calculating a load current step from the plurality of load current areas;

comparing the load current step to a predetermined value; and

in response to the load current step being equal to or greater than the predetermined value, decrementing the counter by a predetermined number.

10. A system for determining whether arcing is present in an electrical circuit comprising:

a sensor for sensing an alternating current in the circuit and developing a corresponding sensor signal;

a circuit for analyzing the sensor signal to determine the presence of broadband noise in a predetermined range of frequencies, and producing a corresponding output signal;

a controller for processing the sensor signal and the output signal to determine current characteristics and a type of load connected to the electrical circuit and to determine, using the load current characteristics and the presence of broadband noise, whether an arcing fault is present in the circuit; and

at least one counter, wherein the at least one counter is incremented in a predetermined fashion in accordance with the input signal and the output signal and the at least one counter is adapted to be decremented based upon a secondary analysis;

wherein the controller is adapted to determine whether an arcing fault is present based at least in part on the states of the at least one counter.

11. The system of claim 10 , wherein the controller and the circuit for analyzing further are provided on a single ASIC.

12. The system of claim 10 wherein the controller increments one or more of a plurality of counters in a predetermined fashion in accordance with the sensor signal and the output signal and determines the type of load based at least in part on the states of one or more of the plurality of counters.

13. The system claim 10 wherein the controller increments one or more of a plurality of counters in accordance with the sensor signal and the output signal and periodically determines whether an arcing fault is present based at least in part on the states of one or more of the plurality of counters.

14. The system claim 13 wherein the controller periodically determines whether an arcing fault is present based at least in part on the states of one or more of the plurality of counters.

15. The system of claim 10 , wherein the secondary analysis is selected from one of the group consisting of pattern recognition, on/off switching detection, thyristor sweep detection, and normalizing a line current or voltage.

16. A method of determining whether arcing is present in an electrical circuit in response to input signals, the input signals corresponding to an alternating current in the circuit and to the presence of broadband noise in a predetermined range of frequencies in the circuit, the method comprising:

incrementing one or more of a plurality of counters in accordance with the input signals;

decrementing the one or more of the plurality of counters in accordance with a result of a secondary factor;

determining a type of load connected to the electrical circuit and whether an arcing fault is present using the states of one or more of the plurality of counters; and

monitoring high frequency noise in the 20 KHz band for each ⅛ cycle of the alternating current.

17. The method of claim 16 and further including producing a trip signal in response to a determination that an arcing fault is present in the circuit.

18. The method of claim 16 wherein the counters are implemented in software.

19. The method of claim 16 wherein the secondary factors is at least one from the group consisting of pattern recognition, on/off switching detection, thyristor sweep detection, and normalizing a line current or voltage.

20. The method of claim 16 further including using the states of selected ones of the plurality of counters for determining the presence of selected sub-harmonics in the current and incrementing one or more others of the counters in response to the presence of the one or more of selected sub-harmonics.