High gain, high frequency CMOS oscillator circuit and method
An oscillator amplifier circuit is provided. The amplifier circuit can be used with a resonator to amplify and form a resonating oscillator. The amplifier circuit comprises an active circuit which includes an inverter and a current-controlled biasing circuit. One transistor of the inverter receives a voltage produced from the biasing circuit in order to place a gate terminal of that transistor at approximately a threshold voltage. The other transistor can be biased using a passive circuit element, such as a resistor. Therefore, both transistors are biased independent of each other within the optimal gain region. Large shunt capacitors are not required and the total current consumption is controlled through a variable resistor coupled to the source terminal of either the first transistor, second transistor, or possibly both transistors of the inverter to adjust the amplitude of the oscillating output.
1. An oscillator amplifier circuit, comprising:
an inverter that includes a first transistor and a second transistor, each said first transistor and said second transistors having a mutually-coupled drain terminal;
a current-controlled biasing circuit coupled to a gate terminal of only the second transistor exclusive of direct or indirect coupling to a gate terminal of the first transistor for biasing the second transistor at approximately a threshold voltage of the second transistor; and
a biasing resistor connected directly between the mutually-coupled drain terminal and a gate terminal of only the first transistor exclusive of direct or indirect coupling to a gate terminal of the second transistor for biasing the first transistor at approximately a threshold voltage of the first transistor.
2. The oscillator amplifier circuit as recited in claim 1 , further comprising a variable resistor coupled to a source terminal of the second transistor for adjusting the amplitude of an output voltage produced on the mutually-coupled drain terminal.
3. The oscillator amplifier circuit as recited in claim 2 , further comprising an amplitude detection circuit coupled to receive a resonator output and, depending on the resulting amplitude produced from the oscillator amplifier circuit, producing an amplitude regulation control signal forwarded to the variable resistor for adjusting the amplitude of the output voltage.
4. The oscillator amplifier circuit as recited in claim 1 , wherein the first transistor comprises a p-channel transistor and the second transistor comprises an n-channel transistor.
5. The oscillator amplifier circuit as recited in claim 1 , wherein the current-controlled biasing circuit is adapted to produce a staff-up current upon activation of the oscillator amplifier circuit that can be programmable to produce a reliable oscillator amplifier circuit operation across varying conditions.
6. The oscillator amplifier circuit as recited in claim 1 , further comprising a resistor coupled between the current-controlled biasing circuit and the gate terminal of the second transistor for substantially preventing the current-controlled biasing circuit from loading an oscillator/resonator circuit.
7. The oscillator amplifier circuit as recited in claim 1 , wherein the current-controlled biasing circuit comprises:
a current source; and
a third transistor having a source terminal coupled to a supply voltage, and a mutually-coupled gate and drain terminal of the third transistor coupled to the gate terminal of the second transistor.
8. An oscillator, comprising:
a first transistor and a second transistor coupled between a power supply and a ground supply, each first and second transistor having a drain terminal coupled to one another;
a direct current voltage at approximately a threshold voltage value applied through a resistor to a gate terminal of the second transistor;
a resonator coupled between the drain terminal and a gate terminal of the first and second transistors; and
a biasing resistor connected directly between the mutually-coupled drain terminal and a gate terminal of only the first transistor exclusive of direct or indirect coupling to a gate terminal of the second transistor for biasing the first transistor at approximately a threshold voltage of the first transistor.
9. The oscillator as recited in claim 8 , further comprising a variable resistor coupled to a source terminal of the second transistor for adjusting the amplitude of an output voltage produced on the mutually-coupled drain terminal.
10. The oscillator as recited in claim 9 , further comprising an amplitude detection circuit coupled to receive a resonator output and, depending on the resulting amplitude produced from the oscillator, producing an amplitude regulation control signal forwarded to the variable resistor for adjusting the amplitude of the output voltage.
11. The oscillator as recited in claim 8 , wherein the first transistor comprises a p-channel transistor and the second transistor comprises an n-channel transistor.
12. The oscillator as recited in claim 8 , wherein the first transistor comprises an n-channel transistor and the second transistor comprises a p-channel transistor.
13. The oscillator as recited in claim 8 , wherein the resistor is coupled for substantially preventing a biasing current from over loading the oscillator.
14. The oscillator as recited in claim 8 , wherein the direct current voltage is supplied from a current-controlled biasing circuit that comprises:
a current source; and
a third transistor having a source terminal coupled to a supply voltage, and a mutually-coupled gate and drain terminal of the third transistor coupled to the gate terminal of the second transistor via the resistor.
15. A method for regulating a resonating output, comprising:
regulating current through a biasing circuit to form a pre-determined DC voltage;
applying the DC voltage to an input of only one of a pair of transistors coupled to form an inverter, exclusive of applying the DC voltage directly or indirectly to an input of the other of the pair of transistors;
biasing an input of the other of the pair of transistors by applying a resistive load between a gate terminal and a drain terminal of that transistor; and
resonating an AC voltage across an input and an output of the inverter.
16. The method as recited in claim 15 , further comprising regulating an amplitude of a voltage produced across the input and output of the inverter by applying a variable resistive load to a source terminal of the one of the pair of transistors.
17. The method as recited in claim 15 , further comprising detecting an amplitude produced from the resonating output corresponding to an amplitude of the resonating AC voltage and using the produced amplitude to control the amount of resistance of the variable resistive load.
18. The method as recited in claim 15 , wherein said regulating comprises sourcing current through a diode-coupled transistor to produce the pre-determined DC voltage from a terminal of the diode-coupled transistor.