Image sensor with improved charge transfer efficiency and method for fabricating the same
An image sensor includes: a gate structure on a semiconductor layer of a first conductive type; a first impurity region of the first conductive type aligned with one side of the gate structure and extending to a predetermined depth from a surface portion of the semiconductor layer; spacers formed on sidewalls of the gate structure; and a second impurity region of a second conductive type formed in a portion of the semiconductor layer under the first impurity region, wherein the first impurity region includes: a first region of which portion aligned with the one side of the gate structure; a second region aligned with the one of the spacers and having a concentration higher than that of the first region; and a third region apart from the one side of the gate structure with a predetermined distance and having a concentration higher than that of the second region.
1. A method for fabricating an image sensor, comprising:
forming a gate structure on a semiconductor layer of a first conductive type;
performing a first ion implantation process to form a first impurity region of a second conductive type aligned with one side of the gate structure and extending to a predetermined depth from a surface portion of the semiconductor layer;
performing a first blanket ion implantation process to form a second impurity region of the first conductive type aligned with the one side of the gate structure and extending to a predetermined depth from the surface portion of the semiconductor layer;
forming spacers on sidewalls of the gate structure;
performing a second blanket ion implantation process to form a third impurity region of the first conductive type aligned with one of the spacers and extending to a predetermined depth from the surface portion of the semiconductor layer;
forming an ion implantation mask exposing the surface portion of the semiconductor layer apart from the one side of the gate structure with a predetermined distance which is larger than a thickness of the one of the spacers; and
performing a second ion implantation process using the ion implantation mask, thereby obtaining a fourth impurity region of the first conductive type extending to a predetermined depth from the surface portion of the semiconductor layer.
2. The method of claim 1 , wherein the spacers include one of an oxide-based material and a nitride-based material.
3. The method of claim 1 , further including, after the forming of the spacers, performing an ion implantation process to form a floating diffusion region of the second conductive type aligned with the other side of the gate structure and extending to a predetermined depth from another surface portion of the semiconductor layer.
4. The method of claim 1 , wherein the forming of the third impurity region uses a higher level of energy than the forming of the second impurity region, and the forming of the fourth impurity region uses a higher level of energy than the forming of the third impurity region.
5. The method of claim 1 , wherein the forming of the third impurity region and the forming of the fourth impurity region use a higher level of energy than the forming of the second impurity region.