IP Library › Granted Patent US 7,372,099
Granted Patent B2
US 7,372,099 · App. 11/199,380 · Granted May 13, 2008

Semiconductor device and its manufacturing method

Assignee: Kabushiki Kaisha Toshiba
View Patent ↗
Loading inventors, assignments & file history…
Monitor This Case
Get email alerts when status or documents change.
Order Certified Copies
Most orders are placed with the USPTO same day — all within 24 business hours.
Order via The Patent Place →
Pre-filled with this patent's details
Quick Facts
Patent No.
US 7,372,099
App. No.
11/199,380
Granted
May 13, 2008
Kind
B2
Abstract

A semiconductor device, which can use silicon-germanium for a source/drain extension of pMOS, form a silicide layer on the source/drain, and realize a high-speed operation, is provided by comprising a gate electrode formed in a first conductive type region of a semiconductor substrate via an insulator, a first sidewall formed on a side face of the gate electrode, a second sidewall formed on a side face of the first sidewall, a semiconductor layer formed below the second sidewall, including a first impurity layer of a second conductive type and containing germanium, a second impurity layer formed in a region outside the second sidewall and containing impurities of the second conductive type with a higher concentration than those in the first impurity layer, and a silicide layer formed on the second impurity layer.

Claims (66)

1. A semiconductor device comprising:

a gate electrode formed in a first conductive type region of a silicon semiconductor substrate via an insulator;

a first sidewall formed on a side face of the gate electrode;

a second sidewall formed on a side face of the first sidewall;

a semiconductor layer formed below the second sidewall, including a first impurity layer of a second conductive type and containing germanium, and having substantially the same width as that of the second sidewall;

a second impurity layer formed in a region outside the second sidewall and containing impurities of the second conductive type with a higher concentration than those in the first impurity layer; and

a silicide layer formed on the second impurity layer.

2. The semiconductor device according to claim 1 ,

wherein a surface of the semiconductor layer is positioned at a higher level than that of a surface of the semiconductor substrate.

3. The semiconductor device according to claim 2 ,

wherein a surface of the second impurity layer is positioned in a different level from the surface of the semiconductor substrate.

4. The semiconductor device according to claim 1 ,

wherein a germanium concentration in the second impurity layer is equal to or less than 10%.

5. The semiconductor device according to claim 1 ,

wherein the semiconductor layer contains silicon germanium.

6. The semiconductor device according to claim 1 ,

wherein the first conductive type is n-type and the second conductive type is p-type.

7. The semiconductor device according to claim 1 ,

wherein the second impurity layer has a lower germanium concentration than the semiconductor layer.

8. The semiconductor device according to claim 7 ,

wherein a surface of the semiconductor layer is positioned at a higher level than that of a surface of the semiconductor substrate.

9. The semiconductor device according to claim 8 ,

wherein a surface of the second impurity layer is positioned in a different level from the surface of the semiconductor substrate.

10. The semiconductor device according to claim 7 ,

wherein a germanium concentration in the second impurity layer is equal to or less than 10%.

11. The semiconductor device according to claim 7 ,

wherein the semiconductor layer contains silicon germanium.

12. The semiconductor device according to claim 1 ,

wherein the second sidewall has a width greater than the first sidewall.

13. The semiconductor device according to claim 1 ,

wherein a surface of the semiconductor layer is positioned at a higher level than that of a surface of the semiconductor substrate, a germanium concentration in the second impurity layer is equal to or less than 10%, wherein the semiconductor layer contains silicon germanium, and the first conductive type is n-type and the second conductive type is p-type.

14. A semiconductor device comprising first and second semiconductor elements, wherein:

the first semiconductor element comprising:

a first gate electrode formed in a first conductive type region of a silicon semiconductor substrate via an insulator;

a first sidewall formed on a side face of the first gate electrode;

a second sidewall formed on a side face of the first sidewall;

a semiconductor layer formed below the second sidewall, including a first impurity layer of a second conductive type and containing germanium, and having substantially the same width as that of the second sidewall;

a second impurity layer formed in a region outside the second sidewall and containing impurities of the second conductive type with a higher concentration than those in the first impurity layer; and

a first silicide layer formed on the second impurity layer; and

the second semiconductor element comprising:

a second gate electrode formed in a second conductive type region of the semiconductor substrate via an insulator;

a third sidewall formed on a side face of the second gate electrode;

a fourth sidewall formed on a side face of the third sidewall;

a third impurity layer of a first conductive type formed in the semiconductor substrate below the sidewall of the fourth sidewall;

a fourth impurity layer formed in a region outside the fourth sidewall and containing impurities of a first conductive type with a higher concentration than those in the third impurity layer; and

a second silicide layer formed on the fourth impurity layer.

15. The semiconductor device according to claim 14 ,

wherein a surface of the semiconductor layer is positioned at a higher level than that of a surface of the semiconductor substrate.

16. The semiconductor device according to claim 14 ,

wherein a germanium concentration in the second impurity layer is equal to or less than 10%.

17. The semiconductor device according to claim 14 ,

wherein the semiconductor layer contains silicon germanium.

18. The semiconductor device according to claim 14 ,

wherein the first conductive type is n-type and the second conductive type is p-type.

19. The semiconductor device according to claim 14 ,

wherein the second impurity layer has a lower germanium concentration than the semiconductor layer.

20. The semiconductor device according to claim 19 ,

wherein a surface of the semiconductor layer is positioned at a higher level than that of a surface of the semiconductor substrate.

21. The semiconductor device according to claim 19 ,

wherein a germanium concentration in the second impurity layer is equal to or less than 10%.

22. The semiconductor device according to claim 19 ,

wherein the semiconductor layer contains silicon germanium.

23. The semiconductor device according to claim 14 ,

wherein the second sidewall has a width greater than the first sidewall.

24. The semiconductor device according to claim 14 ,

wherein a surface of the semiconductor layer is positioned at a higher level than that of a surface of the semiconductor substrate, a germanium concentration in the second impurity layer is equal to or less than 10%, wherein the semiconductor layer contains silicon germanium, and the first conductive type is n-type and the second conductive type is p-type.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Nov 8, 2005
From: YASUTAKE, NOBUAKI
To: KABUSHIKI KAISHA TOSHIBA
Reel/Frame 017195/0548 →
Priority Claims (1)
JP 2005-153948 · May 26, 2005 · national
Continuity (1)
Related Publication 20060270133A1 · Nov 30, 2006