IP Library Granted Patent US 7,375,442
Granted Patent B2
US 7,375,442 · App. 11/810,722 · Granted May 20, 2008

Interface circuit for providing a computer logic circuit with first and second voltages and an associated method

Assignee: LSI Logic Corporation
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Quick Facts
Patent No.
US 7,375,442
App. No.
11/810,722
Granted
May 20, 2008
Kind
B2
Abstract

A universal interface circuit and an associated method are provided that can supply a computer logic circuit, such as the components mounted upon an adapter card, with first and second inputs having first and second predetermined voltage levels, respectively, based upon power drawn from both first and second supply voltages. The interface circuit typically includes a first power supply circuit for providing the first input having the first predetermined voltage level in response to the first supply voltage. Additionally, the interface surface includes a regulator for generating an output having the second predetermined voltage level in response to the first supply voltage. The interface circuit further includes a second power supply circuit for providing an output that also has the second predetermined voltage level, albeit in response to the second supply voltage. In order to divide the anticipated load between the first and second supply voltages, the regulator and the second power supply circuit cooperate to provide the second input having the second predetermined voltage level in instances in which the second supply voltage is present. The interface circuit provides for the universal operation of the computer logic circuit, however, in that the regulator will provide the second input having the second predetermined voltage level in a manner independent of the second power supply circuit in instances in which the second supply voltage is unavailable.

Claims (11)

1. A method implemented by an interface circuit for supplying a computer logic circuit with a first input having a first predetermined voltage level and a second input having a second predetermined voltage level, the first predetermined voltage level being different from the second predetermined voltage level and from a ground, the second predetermined voltage level being different from the ground, the method comprising:

said interface circuit and said computer logic circuit included in an adapter card;

providing, by the interface circuit, the computer logic circuit with the first input having the first predetermined voltage level based upon a first supply voltage;

determining if a second supply voltage that is different from the first supply voltage and from the ground is present;

providing, by the interface circuit, the computer logic circuit with the second input having the second predetermined voltage level,

wherein providing the second input comprises providing the second input having the second predetermined voltage level based upon both the first and second supply voltages if the second supply voltage is present, and

wherein providing the second input comprises providing the second input having the second predetermined voltage level based only upon the first supply voltage if the second supply voltage is unavailable;

said adapter card connected to a first power rail and a second power rail using said interface circuit;

said first supply voltage provided to said interface circuit using the first power rail; and

said second supply voltage provided to said interface circuit using the second power rail if said second supply voltage is present.

2. A method according to claim 1 further comprising isolating the second supply voltage and the computer logic circuit by permitting the second supply voltage to be provided to the computer logic circuit without permitting the computer logic circuit to drive the second supply voltage.

Assignments (8)
CORRECTIVE ASSIGNMENT TO CORRECT THE ERROR IN RECORDING THE MERGER PREVIOUSLY RECORDED AT REEL: 047357 FRAME: 0302. ASSIGNOR(S) HEREBY CONFIRMS THE ASSIGNMENT. Recorded Mar 22, 2019
From: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.
To: AVAGO TECHNOLOGIES INTERNATIONAL SALES PTE. LIMITED
Reel/Frame 048674/0834 →
CORRECTIVE ASSIGNMENT TO CORRECT THE EFFECTIVE DATE OF MERGER PREVIOUSLY RECORDED ON REEL 047195 FRAME 0658. ASSIGNOR(S) HEREBY CONFIRMS THE THE EFFECTIVE DATE IS 09/05/2018. Recorded Oct 29, 2018
From: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.
To: AVAGO TECHNOLOGIES INTERNATIONAL SALES PTE. LIMITED
Reel/Frame 047357/0302 →
MERGER Recorded Oct 4, 2018
From: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.
To: AVAGO TECHNOLOGIES INTERNATIONAL SALES PTE. LIMITED
Reel/Frame 047195/0658 →
TERMINATION AND RELEASE OF SECURITY INTEREST IN PATENTS Recorded Feb 3, 2017
From: BANK OF AMERICA, N.A., AS COLLATERAL AGENT
To: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.
Reel/Frame 041710/0001 →
PATENT SECURITY AGREEMENT Recorded Feb 11, 2016
From: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.
To: BANK OF AMERICA, N.A., AS COLLATERAL AGENT
Reel/Frame 037808/0001 →
TERMINATION AND RELEASE OF SECURITY INTEREST IN PATENT RIGHTS (RELEASES RF 032856-0031) Recorded Feb 2, 2016
From: DEUTSCHE BANK AG NEW YORK BRANCH, AS COLLATERAL AGENT
To: LSI CORPORATION; AGERE SYSTEMS LLC
Reel/Frame 037684/0039 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Apr 3, 2015
From: LSI CORPORATION
To: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.
Reel/Frame 035390/0388 →
PATENT SECURITY AGREEMENT Recorded May 8, 2014
From: LSI CORPORATION; AGERE SYSTEMS LLC
To: DEUTSCHE BANK AG NEW YORK BRANCH, AS COLLATERAL AGENT
Reel/Frame 032856/0031 →
Continuity (3)
Continuation 0993808100 · Aug 23, 2001
Provisional Application 6022723700 · Aug 23, 2000
Related Publication 20080007122A1 · Jan 10, 2008