IP Library › Granted Patent US 7,378,288
Granted Patent B2
US 7,378,288 · App. 11/032,854 · Granted May 27, 2008

Systems and methods for producing light emitting diode array

Assignee: Semileds Corporation
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Quick Facts
Patent No.
US 7,378,288
App. No.
11/032,854
Granted
May 27, 2008
Kind
B2
Abstract

Systems and methods are disclosed for producing vertical LED array on a metal substrate; evaluating said array of LEDs for defects; destroying one or more defective LEDs; forming good LEDs only LED array suitable for wafer level package.

Claims (46)

1. A method for producing known good (light-emitting diode) LED structures, comprising:

providing LED structures having a metal substrate deposited thereon, wherein the LED structures comprise multiple epitaxial layers;

evaluating said LED structures for defects including optical and electrical non-functionality compared to preset criteria; and

removing one or more defective LED structures by removing the multiple epitaxial layers of the defective LED structures such that the known good LED structures remain on the metal substrate.

2. The method of claim 1 , wherein the removing one or more defective LED structures comprises vaporizing a defective LED structure using a laser to elevate a temperature of the defective LED structure to higher than an evaporation temperature.

3. The method of claim 1 , wherein the removing one or more defective LED structures comprises applying a laser beam to cut the defective LED structures from the metal substrate.

4. The method of claim 1 , wherein the evaluating process comprises performing optical and electrical functionality testing on each of said LED structures to identify the known good LED structures and the defective LED structures.

5. The method of claim 1 , further comprising packaging the known good LED structures at a wafer level.

6. The method of claim 1 , wherein the LED structures comprise:

an n-type layer made from one of: GaN and AlGaN;

one or more quantum wells with InAlGaN/GaN layers; and

a p-type layer made from one of: GaN and AlGaN.

7. The method of claim 1 , wherein the metal substrate comprises at least one of Silver, Al, Cr, Pt, Ni, Au, Mo, W, a refractory metal, or a metal alloy thereof.

8. A method for producing a known good (light-emitting diode) LED array, comprising:

providing an array of LED structures, the array having a metal substrate deposited thereon, wherein the LED structures comprise multiple epitaxial layers;

evaluating said array of LED structures for defects including optical and electrical non-functionality compared to a preset criteria; and

removing one or more defective LED structures from the metal substrate by removing the multiple epitaxial layers of the defective LED structures.

9. The method of claim 8 , wherein the removing process comprises vaporizing a defective LED structure using a laser to elevate a temperature of the defective LED structure to higher than an evaporation temperature.

10. The method of claim 8 , wherein the removing one or more defective LED structures comprises applying a laser beam to cut the defective LED structures from the metal substrate.

11. The method of claim 8 , wherein the evaluating process comprises performing optical and electrical functionality testing on each of said LED structures to identify the defective LED structures.

12. The method of claim 8 , further comprising packaging the known good LED array at a wafer level.

13. The method of claim 8 , wherein the LED structures comprise:

an n-type layer made from one of: GaN and AlGaN;

one or more quantum wells with InAlGaN/GaN layers; and

a p-type layer made from one of: GaN and AlGaN.

14. The method of claim 8 , wherein the metal substrate comprises at least one of Silver, Al, Cr, Pt, Ni, Au, Mo, W, a refractory metal, or a metal alloy thereof.

15. A method of manufacturing a vertical (light-emitting diode) LED array on a metal substrate, comprising:

providing a carrier substrate;

depositing an n-GaN layer above the carrier substrate;

depositing active layers above the n-GaN portion;

depositing a p-GaN layer above the active layers;

depositing one or more first metal layers above the p-GaN layer;

applying a masking layer above the first metal layers;

etching the first metal layers, the p-GaN layer, the active layers, and the n-GaN layer to define a plurality of LED structures;

removing the masking layer;

depositing a passivation layer;

removing a portion of the passivation layer on top of the p-GaN layer to expose the first metal layers;

depositing one or more second metal layers to form the metal substrate;

removing the carrier substrate to expose a surface of the n-GaN layer;

evaluating each of the LED structures for a defect using mapping; and

removing one or more defective LED structures from the metal substrate by removing the n-GaN, active, and p-GaN layers of the defective LED structures.

16. The method of claim 15 , wherein the removing process comprises vaporizing a defective LED structure using a laser to elevate a temperature of the defective LED structure to higher than an evaporation temperature.

17. The method of claim 15 , wherein the removing one or more defective LED structures comprises applying a laser beam to cut the defective LEDs from the metal substrate.

18. The method of claim 15 , wherein the removing one or more defective LED structures comprises using a saw blade to cut the defective LED structures from the metal substrate.

19. The method of claim 15 , wherein the metal substrate comprises at least one of copper, nickel, silver, platinum, aluminum, Mo, or tungsten.

20. The method of claim 15 , wherein depositing the second metal layers to form the metal substrate comprises depositing Copper using one of electro plating or electroless plating.

Assignments (4)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jun 17, 2013
From: CHINA SEMILEDS CO., LTD.
To: FOSHAN NATIONSTAR SEMICONDUCTOR CO., LTD.
Reel/Frame 030621/0276 →
CORRECTIVE ASSIGNMENT TO CORRECT THE NAME OF ASSIGNEE PREVIOUSLY RECORDED ON REEL 026211 FRAME 0667. ASSIGNOR(S) HEREBY CONFIRMS THE CHINA SEMILEDS OPTOELECTRONICS CO., LTD.. Recorded May 12, 2011
From: SEMILEDS CORPORATION
To: CHINA SEMILEDS CO., LTD.
Reel/Frame 026271/0493 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 2, 2011
From: SEMILEDS CORPORATION
To: CHINA SEMILEDS OPTOELECTRONICS CO., LTD.
Reel/Frame 026211/0667 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Dec 27, 2005
From: TRAN, ANH CHUONG; DOAN, TRUNG TRI
To: SEMILEDS CORPORATION
Reel/Frame 016939/0177 →
Continuity (1)
Related Publication 20060154390A1 · Jul 13, 2006