IP Library › Granted Patent US 7,391,277
Granted Patent B2
US 7,391,277 · App. 11/458,753 · Granted Jun 24, 2008

Interleaved voltage controlled oscillator

Assignee: International Business Machines Corporation
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Quick Facts
Patent No.
US 7,391,277
App. No.
11/458,753
Granted
Jun 24, 2008
Kind
B2
Abstract

An interleaved voltage-controlled oscillator (VCO) is disclosed. The VCO includes a ring circuit comprising a series connection of main logic inverter gates, a plurality of delay elements connected in parallel with a selected sequence of the main logic inverter gates, at least one temperature compensation circuit comprising a logic inverter gate in series connection with one or more field effect transistors, the field effect transistor responsive to a compensating voltage input that is proportional to temperature, and an electronic circuit in signal communication with the at least one temperature compensation circuit and configured to provide a voltage signal responsive to temperature. Each delay element includes a feedforward section, comprising controls for regulating signal transmission through feedforward elements responsive to one or more control voltages, and a proportional section, comprising controls for regulating signal transmission through at least one logic inverter gate.

Claims (19)

1. A method to compensate for temperature in an interleaved voltage-controlled oscillator comprising a ring circuit, the ring circuit comprising a series connection of main logic inverter gates, the method comprising:

generating a voltage signal responsive to absolute temperature, wherein the generating a voltage signal responsive to absolute temperature comprises generating a voltage signal responsive to temperature of approximately 1000 parts per million per degree Celsius;

amplifying the voltage signal proportional to absolute temperature;

generating a DC offset voltage to be summed with the amplified voltage signal; and

supplying the summed voltage signal to a temperature compensation circuit comprising one or more field effect transistors connected in series with a logic inverter gate.

2. The method of claim 1 , wherein the generating a voltage signal proportional to absolute temperature comprises:

generating a voltage signal directly proportional to absolute temperature.

3. A method to compensate for temperature in an interleaved voltage-controlled oscillator comprising a ring circuit, the ring circuit comprising a series connection of main logic inverter gates, the method comprising:

generating a voltage signal responsive to absolute temperature;

amplifying the voltage signal proportional to absolute temperature;

generating a DC offset voltage to be summed with the amplified voltage signal; and

supplying the summed voltage signal to a temperature compensation circuit comprising one or more field effect transistors connected in series with a logic inverter gate, wherein the supplying the summed voltage signal comprises:

supplying the summed voltage signal to at least one temperature compensation circuit connected in parallel with at least one of a plurality of delay elements, the delay elements connected in parallel with a selected sequence of the main logic inverter gates.

4. A method to compensate for temperature in an interleaved voltage-controlled oscillator comprising a ring circuit, the ring circuit comprising a series connection of main logic inverter gates, the method comprising:

generating a voltage signal responsive to absolute temperature;

amplifying the voltage signal proportional to absolute temperature;

generating a DC offset voltage to be summed with the amplified voltage signal; and

supplying the summed voltage signal to a temperature compensation circuit comprising one or more field effect transistors connected in series with a logic inverter gate, wherein the supplying the summed voltage signal comprises:

supplying the summed voltage signal to a temperature compensation circuit connected in parallel with at least one of the main logic inverter gates.

Assignments (3)
CHANGE OF NAME Recorded Dec 20, 2021
From: FACEBOOK, INC.
To: META PLATFORMS, INC.
Reel/Frame 058553/0802 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Apr 4, 2012
From: INTERNATIONAL BUSINESS MACHINES CORPORATION
To: FACEBOOK, INC.
Reel/Frame 027991/0454 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jul 20, 2006
From: BOERSTLER, DAVID W.; HAILU, ESKINDER; QI, JIEMING; SHEN, MIKE
To: INTERNATIONAL BUSINESS MACHINES CORPORATION
Reel/Frame 017966/0235 →
Continuity (1)
Related Publication 20080018408A1 · Jan 24, 2008