IP Library Granted Patent US 7,393,580
Granted Patent B2
US 7,393,580 · App. 11/258,856 · Granted Jul 1, 2008

Layered board and electronic apparatus having the layered board

Assignee: Fujitsu Limited
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Quick Facts
Patent No.
US 7,393,580
App. No.
11/258,856
Granted
Jul 1, 2008
Kind
B2
Abstract

A layered board is disclosed which can avoid the occurrence of cracks in a core layer due to shearing stress caused by a difference in coefficient of thermal expansion between the core layer and a buildup layer. The layered board includes a core layer which serves as a printed board, a buildup layer which includes an insulation part and a wiring part, is overlaid on the core layer, and is electrically connected to the core layer, and an edge layer formed at least at an edge on the periphery of the core layer, the edge layer being different from the core layer. Alternatively, the core layer projects outward from an edge on the periphery of the buildup layer.

Claims (29)

1. A layered board comprising:

a core layer which serves as a printed board;

a buildup layer which includes an insulation part and a wiring part, is overlaid on said core layer, and is electrically connected to said core layer; and

an edge layer formed at least at an edge on a periphery of said core layer, said edge layer being made of a material different from that of said core layer,

wherein said edge layer is formed at the edge on the periphery of said core layer and at an edge on the periphery of said buildup layer.

2. A layered board according to claim 1 , wherein a periphery of said buildup layer projects outward from the edge on the periphery of said core layer, and at least a part of said edge layer is formed under the periphery of said buildup layer.

3. A layered board according to claim 1 , wherein said buildup layer includes a first buildup layer overlaid on the front side of said core layer and a second buildup layer overlaid on the back side of said core layer.

4. A layered board according to claim 1 , wherein a coefficient of thermal expansion of said edge layer is higher than a coefficient of thermal expansion of said core layer.

5. A layered board according to claim 1 , wherein a coefficient of thermal expansion of said edge layer is equal to or lower than a coefficient of thermal expansion of said buildup layer.

6. A layered board according to claim 1 , wherein a coefficient of thermal expansion of said edge layer is closer to a coefficient of thermal expansion of said buildup layer than a coefficient of thermal expansion of said core layer.

7. A layered board according to claim 1 , wherein a coefficient of thermal expansion of said core layer is lower than a coefficient of thermal expansion of said buildup layer.

8. An electronic apparatus comprising:

a layered board according to claim 1 .

9. A layered board comprising:

a core layer which serves as a printed board;

a buildup layer which includes an insulation part and a wiring part, is overlaid on said core layer, and is electrically connected to said core layer; and

an edge layer formed at least at an edge on a periphery of said core layer, said edge layer being made of a material different from that of said core layer,

wherein said buildup layer includes a first buildup layer overlaid on the front side of said core layer and a second buildup layer overlaid on the back side of said core layer, and

wherein peripheries of said first and second buildup layers project outward from the edge on the periphery of said core layer, and said edge layer is sandwiched between the peripheries of said first and second buildup layers.

10. A layered board comprising:

a core layer which serves as a printed board;

a buildup layer which includes an insulation part and a wiring part, is overlaid on said core layer, and is electrically connected to said core layer; and

an edge layer formed at least at an edge on a periphery of said core layer, said edge layer being made of a material different from that of said core layer,

wherein said edge layer is a resin layer.

11. A layered board comprising:

a core layer which serves as a printed board;

a buildup layer which includes an insulation part and a wiring part, is overlaid on said core layer, and is electrically connected to said core layer; and

an edge layer formed at least at an edge on a periphery of said core layer, said edge layer being made of a material different from that of said core layer,

wherein said edge layer is formed over the entire periphery of said core layer.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Oct 27, 2005
From: KANDA, TAKASHI
To: FUJITSU LIMITED
Reel/Frame 017149/0698 →
Priority Claims (1)
JP 2005-198218 · Jul 7, 2005 · national
Continuity (1)
Related Publication 20070009718A1 · Jan 11, 2007