IP Library › Granted Patent US 7,397,106
Granted Patent B2
US 7,397,106 · App. 11/299,999 · Granted Jul 8, 2008

Laser fuse with efficient heat dissipation

Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
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Quick Facts
Patent No.
US 7,397,106
App. No.
11/299,999
Granted
Jul 8, 2008
Kind
B2
Abstract

A semiconductor structure having an efficient thermal path and a method for forming the same are provided. The semiconductor structure includes a protection ring over a semiconductor substrate and substantially encloses a laser fuse structure. The laser fuse structure includes a laser fuse and a connection structure connecting the fuse to integrated circuits. The protection ring is thermally coupled to the semiconductor substrate by contacts. The semiconductor structure further includes a metal plate conducting heat generated by a laser beam to the protection ring.

Claims (34)

1. A semiconductor structure comprising:

a semiconductor substrate;

a laser fuse connected to a connection structure over the semiconductor substrate;

a protection ring over the semiconductor substrate and substantially enclosing the laser fuse and the connection structure;

a conductive plate underlying and physically disconnected from the laser fuse, the conductive plate being physically connected to the protection ring, wherein the conductive plate comprises a first end physically connected to the protection ring, and a second end physically disconnected from the protection ring; and

at least one electrical contact thermally coupling the protection ring and the semiconductor substrate.

2. The semiconductor structure of claim 1 , wherein the conductive plate comprises a metal and is formed in a metallization layer immediately underlying a top metallization layer.

3. The semiconductor structure of claim 1 , wherein the protection ring comprises a first region and a second region, and wherein the first region is connected to the substrate by a plurality of contacts, and wherein the second region is not connected to the substrate by contacts.

4. The semiconductor structure of claim 1 , wherein the at least one contact substantially extends into the substrate.

5. The semiconductor structure of claim 1 , wherein the at least one contact is coupled to a P-well region of the semiconductor substrate.

6. An integrated circuit structure formed in a semiconductor chip, the integrated circuit structure comprising:

a protection ring connected to a semiconductor substrate, wherein the protection ring comprises:

a plurality of metal lines in respective metal layers and surrounding a fuse region of the semiconductor chip, wherein the plurality of metal lines each forms a ring;

a plurality of vias connecting each metal line with a superjacent or subjacent metal line; and

a plurality of dielectric layers respectively isolating each metal layer from each subjacent or superjacent metal layer;

a plurality of contacts physically connecting the protection ring to the semiconductor substrate, wherein the protection ring comprises a first region and a second region, and wherein the first region is connected to the substrate by a plurality of contacts, and wherein the second region is not connected to the substrate by contacts; and

a metal plate underlying a top metallization layer of the metal layers, wherein the metal plate is electrically connected to the protection ring.

7. The integrated circuit structure of claim 6 further comprising a laser fuse structure in the fuse region, wherein the laser fuse structure comprises:

a laser fuse;

a plurality of metal islands in respective metal layers under the laser fuse; and

a plurality of additional vias connecting the respective metal islands to subjacent or superjacent metal islands; and

a conductive line electrically coupling the laser fuse and an integrated circuit.

8. The integrated circuit structure of claim 7 , wherein a width of the metal plate is greater than about 50 percent of a distance between metal islands in a same metallization layer.

9. The integrated circuit structure of claim 6 , wherein the metal lines of the protection ring distribute from a first metallization layer to a top metallization layer.

10. The integrated circuit structure of claim 6 , wherein the metal plate and a metal line in a same metallization layer are continuous.

11. A semiconductor structure comprising:

a semiconductor substrate;

a fuse structure comprising a laser fuse and a connection structure over the semiconductor substrate, the fuse being on a top metallization layer;

a protection ring over the semiconductor substrate and substantially enclosing the fuse structure;

a metal plate in a metal layer immediately underlying the top metallization layer, the metal plate having a lengthwise direction and a width wise direction, wherein the metal plate is physically connected to the protection ring only in the lengthwise direction; and

a plurality of contacts connecting the protection ring and the semiconductor substrate.

12. The integrated circuit structure of claim 11 , wherein both ends of the metal plate are physically connected to the protection ring.

13. The integrated circuit structure of claim 6 , wherein at least one end of the metal plate is physically connected to the protection ring.

14. The semiconductor structure of claim 1 , wherein the semiconductor substrate and the conductive plate are interconnected through metal features only.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Dec 12, 2005
From: TSAI, HAO-YI; YANG, CHAO-HSIANG; HOU, SHANG-YUN; TSAI, CHIA-LUN; JENG, SHIN-PUU
To: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
Reel/Frame 017356/0467 →
Continuity (1)
Related Publication 20070132059A1 · Jun 14, 2007