Adverse condition detector with diagnostics
An adverse condition detector that records historical data concerning the operation of the detector such that the detector can be interrogated by a technician. The microprocessor of the adverse condition detector monitors for alarm conditions and other important information related to the operation of the detector. Upon identifying an important characteristic of the detector operation, the microprocessor time stamps the information and stores the information within memory of the microprocessor. The detector includes an interface pad that is accessible from the exterior of the detector such that a technician can access the interface pad without removing the detector housing.
1. A method of operating an adverse condition detector including at least an adverse condition detection circuit and a microprocessor contained within a housing, the method comprising the steps of:
activating an internal clock within the microprocessor upon the initial activation of the adverse condition detector;
operating the microprocessor within the adverse condition detector to monitor for the occurrence of one of a series of monitored events related to the operation of the adverse condition detector;
recording the occurrence of the monitored event and a time stamp within the microprocessor of the adverse condition detector, the time stamp being the value of the internal clock upon the occurrence of the monitored event; and
interrogating the microprocessor to extract the recorded occurrences of the monitored events and the associated time stamps.
2. The method of claim 1 further comprising the step of providing an interface pad on the adverse condition detector in communication with a microprocessor.
3. The method of claim 2 wherein the microprocessor is interrogated by an external communication device coupled to the interface pad.
4. The method of claim 3 wherein the microprocessor and the interface pad are contained within the housing, the housing having a series of pin openings aligned with the interface pad such that interface pad is accessible through the housing.
5. The method of claim 1 wherein the adverse condition detection circuit is a carbon monoxide detection circuit and the series of monitored events include the detection of carbon monoxide concentration levels above a selected threshold.
6. The method of claim 2 further comprising the step of downloading parameters to the microprocessor through the interface pad.
7. The method of claim 1 further comprising the step of incrementing an occurrence counter upon the occurrence of a monitored event, wherein the microprocessor can be interrogated to extract the value of the occurrence counter.
8. The method of claim 1 wherein the adverse condition detector includes both a carbon monoxide detection circuit and a smoke detection circuit, wherein the monitored events include at least the actuation of a smoke alarm and the actuation of a carbon monoxide alarm.
9. The method of claim 1 wherein the step of interrogating the microprocessor includes:
receiving an information request from an external communication device through the interface pad; and
generating a message including the requested information to the interface pad.
10. The method of claim 1 wherein the monitored event and the time stamp are stored in non-volatile memory of the microprocessor.
11. The method of claim 1 wherein the monitored event and the time stamp are stored in non-volatile memory external to the microprocessor.
12. An adverse condition detector comprising:
an enclosed housing;
a microprocessor contained within the housing and including an internal clock;
at least a first adverse condition detection circuit contained within the housing and coupled to the microprocessor and operable to detect the presence of an adverse condition; and
an interface pad contained within the housing and coupled to the microprocessor such that the microprocessor can receive information through the interface pad and transmit information to an external communication device through the interface pad,
wherein the microprocessor is operable to monitor for the occurrence of a monitored event and record both the occurrence of the monitored event detected by the adverse condition detection circuit and a time stamp, wherein the time stamp is the value of the internal clock upon the occurrence of the monitored event.
13. The adverse condition detector of claim 12 wherein the adverse condition detection circuit is a carbon monoxide detection circuit.
14. The adverse condition detector of claim 12 wherein the adverse condition detection circuit is a smoke detection circuit.
15. The adverse condition detector of claim 12 wherein the housing includes a series of pin openings aligned with the interface pad such that the interface pad is accessible from the exterior of the housing through the pin openings.
16. The adverse condition detector of claim 12 further comprising a second adverse condition detection circuit operable to detect the presence of a second adverse condition.
17. The adverse condition detector of claim 12 wherein the internal clock of the microprocessor is actuated upon the initial activation of the adverse condition detector.
18. The adverse condition detector of claim 12 wherein the detector further comprises a non-volatile memory located external to the microprocessor.
19. The adverse condition detector of claim 12 wherein the microprocessor includes non-volatile memory for storing the occurrence of the monitored event and the time stamp.