IP Library › Granted Patent US 7,411,767
Granted Patent B2
US 7,411,767 · App. 10/859,332 · Granted Aug 12, 2008

Multi-domain ESD protection circuit structure

Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
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Quick Facts
Patent No.
US 7,411,767
App. No.
10/859,332
Granted
Aug 12, 2008
Kind
B2
Abstract

A multi-domain ESD protection circuit structure is described. The preferred embodiment of the present invention selects power lines of an internal circuit as ESD buses. The power lines of the remaining internal circuits are coupled with the ESD buses through the ESD connection cells. In another embodiment of the preferred invention, the VDD power line from one internal circuit and the VSS power line from another circuit are selected as ESD buses. In yet another embodiment, either a VDD power line or a VSS power line of an internal circuit is selected as an ESD bus.

Claims (99)

1. An electrostatic discharge (ESD) protection circuit structure comprising:

a plurality of first power lines;

a plurality of second power lines;

an ESD bus;

a plurality of first internal circuits, each coupled between one of the first power lines and one of the second power lines;

a third power line;

a fourth power line;

a second internal circuit connected to the third power line and coupled to the fourth power line;

a plurality of first ESD bi-directional connection cells, each connected between one of the first power lines and the third power line;

a plurality of second ESD bi-directional connection cells, each coupled between one of the second power lines and the ESD bus;

an ESD bi-directional connection cell coupled between the fourth power line and the ESD bus; and

an ESD clamp coupled between the third power line and the ESD bus.

2. The ESD protection circuit structure of claim 1 wherein the plurality of first power lines are VDD power lines, the plurality of second power lines are VSS power lines, the third power line is a VDD power line, and the fourth power line is a VSS power line.

3. The ESD protection circuit structure of claim 1 wherein the plurality of first power lines are VSS lines, the plurality of second power lines are VDD lines, the third power line is a VSS line, and the fourth line is a VDD line.

4. The ESD protection circuit structure of claim 1 wherein the ESD bus is a metal line.

5. The ESD protection circuit structure of claim 1 wherein the ESD bus is a copper line.

6. The ESD protection circuit structure of claim 1 wherein the ESD bus and the third power line are wider than the plurality of first power lines and the plurality of second power lines.

7. The ESD protection circuit structure of claim 1 wherein the plurality of the first ESD bi-directional connection cells are directly connected between one of the first power lines and the third power line, and wherein the second internal circuit is directly connected to the third power line.

8. An ESD protection circuit structure comprising:

a plurality of first power lines;

a plurality of second power lines;

a plurality of first internal circuits, each coupled between one of the plurality of first power lines and one of the plurality of second power lines;

a third power line;

a fourth power line;

a second internal circuit connected to the third power line and coupled to the fourth power line;

a fifth power line;

a sixth power line;

a third internal circuit coupled to the fifth power line and connected to the sixth power line;

a plurality of first ESD bi-directional connection cells, each coupled between one of the plurality of first power lines and the third power line;

a plurality of second ESD bi-directional connection cells, each coupled between one of the plurality of second power lines and the sixth power line;

a third ESD bi-directional connection cell coupled between the fourth power line and the sixth power line; and

a fourth ESD bi-directional connection cell coupled between the third power line and the fifth power line.

9. The ESD protection circuit structure of claim 8 wherein the third power line and the sixth power line are metal lines.

10. The ESD protection circuit structure of claim 8 wherein the third power line and the sixth power line are copper lines.

11. The ESD protection circuit structure of claim 8 wherein the third power line and the sixth power line are wider than the first power lines, the second power lines, the fourth power line and the fifth power line.

12. The ESD protection circuit structure of claim 8 wherein:

the second internal circuit is directly connected to the third power line;

the third internal circuit is directly connected to the sixth power line;

each of the first ESD bi-directional connection cells is directly connected to one of the first power lines and the third power line; and

each of the second ESD bi-directional connection cells is directly connected to one of the second power lines and the sixth power line.

13. An ESD protection circuit structure comprising:

a first ESD bus and a second ESD bus;

a plurality of first compound ESD devices, each of the first compound ESD devices having a power line coupled to an ESD connection cell;

a plurality of second compound ESD devices, each of the second compound ESD devices having a power line coupled to an ESD connection cell;

a plurality of first internal circuits, each coupled with the first ESD bus through one of the first compound ESD devices, wherein the ESD connection cell of the first compound ESD device is coupled with the first ESD bus and wherein the power line of the first compound ESD device is coupled with the first internal circuit;

a plurality of second internal circuits, each coupled with the second ESD bus through one of the second compound ESD devices wherein the ESD connection cell of the second compound ESD device is coupled with the second ESD bus and the power line of the second compound ESD device is coupled with the second internal circuit;

a third internal circuit having a first end connected to the first ESD bus; and

an ESD clamp coupled between the first ESD bus and the second ESD bus.

14. The ESD protection circuit structure of claim 13 wherein:

the first end of the third internal circuit is directly connected to the first ESD bus;

each of the first internal circuits is directly connected to the first ESD bus through one of the first compound ESD devices, wherein the ESD connection cell of the first compound ESD device is directly connected to the first ESD bus and wherein the power line of the first compound ESD device is directly connected to the first internal circuit; and

each of the second internal circuits is directly connected to the second ESD bus through one of the second compound ESD devices wherein the ESD connection cell of the second compound ESD device is directly connected to the second ESD bus and the power line of the second compound ESD device is directly connected to the second internal circuit.

15. The ESD protection circuit structure of claim 13 wherein the first ESD bus and the second ESD bus are wider than the power lines of the first compound ESD devices and the power lines of the second compound ESD devices.

16. The ESD protection circuit structure of claim 13 wherein:

the first ESD bus is a VDD power line;

the power line of the first compound ESD device is a VDD power line;

the second ESD bus is a VSS power line; and

the power line of the second compound ESD device is a VSS power line.

17. The ESD protection circuit structure of claim 13 wherein:

the first ESD bus is a VSS power line;

the power line of the first compound ESD device is a VSS power line;

the second ESD bus is a VDD power line; and

the power line of the second compound ESD device is a VDD power line.

18. The ESD protection circuit structure of claim 13 wherein:

the third internal circuit having a second end connected to the second ESD bus.

19. The ESD protection circuit structure of claim 18 wherein:

the first end of the third internal circuit is directly connected to the first ESD bus;

the second end of the third internal circuit is directly connected to the second ESD bus;

each of the plurality of the first internal circuits is directly connected to the first ESD bus through one of the first compound ESD devices, wherein the ESD connection cell of the first compound ESD device is directly connected to the first ESD bus and wherein the power line of the first compound ESD device is directly connected to the first internal circuit; and

each of the plurality of the second internal circuits is directly connected to the second ESD bus through one of the second compound ESD devices wherein the ESD connection cell of the second compound ESD device is directly connected to the second ESD bus and the power line of the second compound ESD device is directly connected to the second internal circuit.

20. The ESD protection circuit structure of claim 13 wherein:

the third internal circuit has a second end coupled with the second ESD bus through one of the second compound ESD devices with the power line of the second compound ESD device coupled with the third internal circuit.

21. The ESD protection circuit structure of claim 20 further comprising:

a fourth internal circuit having a first end coupled with the first ESD bus through one of the first compound ESD devices wherein the power line of the first compound ESD device is coupled with the fourth internal circuit; and

the fourth internal circuit having a second end connected to the second ESD bus.

22. The ESD protection circuit structure of claim 21 wherein:

the first end of the third internal circuit is directly connected to the first ESD bus;

the second end of the third internal circuit is directly connected to the second ESD bus through one of the second compound ESD devices with the power line of the second compound ESD device directly connected to the third internal circuit;

the first end of the fourth internal circuit is directly connected to the first ESD bus through one of the first compound ESD devices wherein the power line of the first compound ESD device is directly connected to the fourth internal circuit;

the second end of the fourth internal circuit is directly connected to the second ESD bus;

each of the first internal circuits is directly connected to the first ESD bus through one of the first compound ESD devices, wherein the ESD connection cell of the first compound ESD device is directly connected to the first ESD bus and wherein the power line of the first compound ESD device is directly connected to the first internal circuit; and

each of the second internal circuits is directly connected to the second ESD bus through one of the second compound ESD devices wherein the ESD connection cell of the second compound ESD device is directly connected to the second ESD bus and the power line of the second compound ESD device is directly connected to the second internal circuit.

23. A whole chip ESD protection circuit structure comprising:

a plurality of ESD protection circuit structures wherein each ESD protection circuit structure comprises a first ESD bus, a second ESD bus, a plurality of first compound ESD devices, a plurality of second compound ESD devices, a plurality of first internal circuits, a plurality of second internal circuits, a third internal circuit and an ESD clamp, wherein;

each of the plurality of first compound ESD devices has a power line coupled to an ESD connection cell;

each of the plurality of second compound ESD devices has a power line coupled to an ESD connection cell;

each of the first internal circuits is coupled with the first ESD bus through one of the first compound ESD devices wherein the ESD connection cell of the first compound ESD device is coupled with the first ESD bus and the power line of the first compound ESD device is coupled with the first internal circuit;

each of the second internal circuits is coupled with the second ESD bus though one of the second compound ESD devices and wherein the ESD connection cell of the second compound ESD device is coupled with the second ESD bus and wherein the power line of the second compound ESD device is coupled with the second internal circuit;

the third internal circuit has a first end connected to the first ESD bus;

the ESD clamp is coupled between the first ESD bus and the second ESD bus; and

a plurality of ESD clamp devices, wherein the first ESD bus and the second ESD bus of the plurality of ESD protection circuit structures are coupled by the plurality of ESD clamp devices.

24. The whole chip ESD protection circuit structure of claim 23 wherein:

the first ESD bus is a VDD power line and the power line of the first compound ESD device is a VDD power line; and

the second ESD bus is a VSS power line and the power line of the second compound ESD device is a VSS power line.

25. The whole chip ESD protection circuit structure of claim 24 wherein the first ESD bus and the second ESD bus are wider than the power line of the first compound ESD device and the power line of the second compound ESD device.

26. The whole chip ESD protection circuit structure of claim 23 wherein:

the first end of the third internal circuit is directly connected to the first ESD bus;

each of the first internal circuits is directly connected to the first ESD bus through one of the first compound ESD devices, wherein the ESD connection cell of the first compound ESD device is directly connected to the first ESD bus and wherein the power line of the first compound ESD device is directly connected to the third internal circuit; and

each of the second internal circuits is directly connected to the second ESD bus through one of the second compound ESD devices wherein the ESD connection cell of the second compound ESD device is directly connected to the second ESD bus and the power line of the second compound ESD device is directly connected to the second internal circuit.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jun 2, 2004
From: HUANG, SHAO-CHANG; AN, CHI-DI; SONG, MING-HSIANG
To: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
Reel/Frame 015436/0520 →
Continuity (1)
Related Publication 20050270712A1 · Dec 8, 2005