High performance capacitor with high dielectric constant material
View Patent ↗A multilayered high performance capacitor formed of two or more conductors with a dielectric layer and one or more a dielectric-conductor interface layer sandwiched in between the conductors. The capacitor may be fabricated using many thin layers, at the nano level, providing a nanocapacitor. The capacitor may employ an interleaved structured where numerous conductor layers are interleaved with other conductor layers. The dielectric layers may be multilayered or a single layer and may consist of materials with high dielectric constants ranging from 800 to over 1 million, including materials in the perovskite-oxide family. The capacitor can be shaped, sized and the appropriate materials selected to obtain breakdown voltages within the range of 0.1 to over 11 MV/cm and to obtain specific energies and energy densities equivalent to or exceeding the power characteristics of known capacitors, fuel cells, and batteries. The nanocapacitor may be combined with other nanocapacitors to form stacks, packs, or grids of cells where the cells may be connected in series, parallel or both to provide increased energy or power characteristics.
1. A capacitor, comprising:
a top conductor layer of a conductive material;
a bottom conductor layer of said conductive material; and
at least one intermediate dielectric layer of a dielectric material disposed between said top layer and said bottom layer; wherein said at least one intermediate dielectric layer is comprised of a dielectric material with a dielectric constant in the range 800 to 1,000,000; and
at least one interface layer comprised of a mix of said conductive material and said dielectric material disposed between said at least one intermediate dielectric layer and said top conductor layer or said bottom conductor layer.
2. The capacitor of claim 1 , wherein said capacitor produces specific energies in the range of 5-10,000 Whr/kg.
3. The capacitor of claim 1 , wherein said capacitor produces energy densities in the range of 20-76,000 Whr/l.
4. The capacitor of claim 1 , wherein said at least one of said top conductor layer or said bottom conductor layer is a multilayer conductor layer.
5. The capacitor of claim 1 , wherein said at least one intermediate dielectric layer is a multilayer dielectric layer.
6. The capacitor of claim 1 , wherein said top conductor layer and said bottom conductor layer function as electrodes.
7. The capacitor of claim 1 , wherein said conductive material is selected from the group consisting of Ag, Cu, Pt, Pd, Ni, Au, La, and Al.
8. The capacitor of claim 1 , wherein said dielectric material is selected from the group consisting of BST, PMN, LSNO, PFN, BTO, CCTO.
9. A capacitor, compromising:
a top conductor layer of a conductive material;
a bottom conductor layer of said conductive material; and
at least one intermediate dielectric layer of a dielectric material disposed between said top layer and said bottom layer; wherein said at least one intermediate dielectric layer is comprised of a dielectric material with a dielectric constant in the range of 800 to 1,000,000; and
at least one intermediate conductor layer comprised of said conductive material disposed between a first intermediate dielectric layer and a second intermediate dielectric layer.
10. The capacitor of claim 9 , wherein said top conductor layer is connected to a first terminal, said bottom conductor layer is connected to a second terminal and said at least one intermediate conductor layer is connected to said first terminal or said second terminal.
11. The capacitor of claim 9 , wherein said first intermediate dielectric layer and said second intermediate dielectric layer are connected.
12. The capacitor of claim 9 , wherein a first intermediate conductor layer and a second intermediate conductor layer of said at least one intermediate conductor layers are interleaved.
13. A capacitor, comprising:
a top conductor layer of a conductive material;
a bottom conductor layer of said conductive material;
at least one intermediate dielectric layer of a dielectric material disposed between said top layer and said bottom layer; wherein said at least one intermediate dielectric layer is comprised of a dielectric material with a dielectric constant in the range 800 to 1,000,000;
at least one interface layer comprised of a mix of said conductive material and said dielectric material disposed between said at least one intermediate dielectric layer and said top conductor layer or said bottom conductor layer;
at least one intermediate conductor layer comprised of said conductive material disposed between a first intermediate dielectric layer and a second intermediate dielectric layer of said at least one intermediate dielectric layer; and
wherein said capacitor produces specific energies in the range of 5-10,000 Whr/kg and said capacitor produces energy densities in the range of 20-76,000 Whr/l.
14. A grid of capacitors interconnected, wherein each of said capacitors comprises:
a top conductor layer of a conductive material;
a bottom conductor layer of said conductive material; and
at least one intermediate dielectric layer of a dielectric material disposed between said top layer and said bottom layer; wherein said at least one intermediate dielectric layer is comprised of a dielectric material with a dielectric constant in the range 800 to 1,000,000; and
at least one interface layer comprised of a mix of said conductive material and said dielectric material disposed between said at least one intermediate dielectric layer and said top conductor layer or said bottom conductor layer.
15. A method of fabricating a multilayer capacitor, comprising the steps of:
depositing a bottom conductor layer of a conductive material onto a substrate to form a capacitor device;
heating the device;
masking selected areas of the device;
depositing an interface layer of an interface material mixture the device removing the maskant;
heating the device;
masking selected areas of the device;
depositing a dielectric layer of a dielectric material on the device;
removing the maskant;
heating the device;
depositing a top conductor layer of said conductive material on the device; and
heating the device.
16. The method of claim 15 , wherein at least one of said bottom conductor layer, said top conductor layer, said interface layer, or said dielectric layer is deposited by print screening.
17. The method of claim 15 , wherein at least one of said bottom conductor layer, said top conductor layer, said interface layer, or said dielectric layer is deposited by pulse laser deposition.
18. The method of claim 15 , wherein the conductive material is selected from the group consisting of Ag, Cu, Pt, Pd, Ni, Au, La, and Al.
19. The method of claim 15 , wherein the dielectric material is selected from the group consisting of BST, PMN, LSNO, PFN, BTO, CCTO.
20. The method of claim 15 , further compromising the step of repeating the pattern of depositing a conductor layer, and interface layer, a dielectric layer, a second interface layer and another said conductor layer until the desired number of layers is obtained.
21. The method of claim 20 , wherein said conductor layers are formed to be connected to a conductive terminal.
22. The method of claim 20 , wherein said conductor layers are formed in an interleaved formation.
23. The method of claim 20 , wherein said dielectric layers are formed to be interconnected.
24. The method of claim 15 , further comprising the steps positioning the fabricated capacitors adjacent to one another and interconnecting said capacitors to form an array, bank, or grid of capacitors.
25. The method of claim 24 , further compromising the step of positioning and connecting fuses in between the capacitors.