Line driving circuit of semiconductor device

1. A line driving circuit of a semiconductor device, the line driving circuit comprising:

a first NMOS transistor connected between a supply voltage and a first node;

a second NMOS transistor connected between the first node and ground; and

a differential amplification unit for generating first and second output signals to be applied to the gates of the first and second NMOS transistors, respectively,

wherein the first and second output signals have a complementary relationship, and the first and second output signals have a voltage level corresponding to a level of the supply voltage or a ground voltage,

wherein the first NMOS transistor outputs a voltage to the first node that is substantially a threshold voltage of the first NMOS transistor subtracted from the supply voltage when the first NMOS transistor is turned on, such that the line driving circuit has a reduced swing width,

a receiver, which receives a signal outputted through the first node and converts a voltage level of the received signal and has transistors connected to form a cross-coupled latch structure, the receiver comprising:

a first PMOS transistor connected between the supply voltage and a second node;

a third NMOS transistor connected between the second node and a third node;

a second PMOS transistor connected between the supply voltage and a fourth node; and

a fourth NMOS transistor connected between the fourth node and ground,

wherein the first node is connected to the third node, the second node is connected to a gate of the second PMOS transistor, the fourth node is connected to a gate of the first PMOS transistor, a gate of the third NMOS transistor is connected to the supply voltage, and a gate of the fourth NMOS transistor is connected to the third node.

2. The line driving circuit as claimed in claim 1 , wherein the first node is connected to an input node of an interior circuit in the semiconductor device by means of a transmission line.

3. The line driving circuit as claimed in claim 1 , wherein the fourth node is connected to an input node of an interior circuit in the semiconductor device.

4. A line driving circuit of a semiconductor device, the line driving circuit comprising:

a first NMOS transistor connected between a supply voltage and a first node;

a second NMOS transistor connected between the first node and ground; and

a differential amplification unit for generating first and second output signals to be applied to the gates of the first and second NMOS transistors, respectively,

wherein the first and second output signals have a complementary relationship, and the first and second output signals have a voltage level corresponding to a level of the supply voltage or a ground voltage,

wherein the first NMOS transistor outputs a voltage to the first node that is substantially a threshold voltage of the first NMOS transistor subtracted from the supply voltage when the first NMOS transistor is turned on, such that the line driving circuit has a reduced swing width,

a first transmission line connected to the first node;

a line repeater for receiving and restoring a signal applied through the first transmission line; and

a second transmission line for receiving a signal outputted from the line repeater.

wherein the line repeater comprises:

a receiver for receiving the signal applied through the first transmission line and converting a voltage level of the received signal, the receiver comprising:

a first PMOS transistor connected between the supply voltage and a second node;

a third NMOS transistor connected between the second node and a third node;

a second PMOS transistor connected between the supply voltage and a fourth node; and

a fourth NMOS transistor connected between the fourth node and ground,

wherein the first node is connected to the third node, the second node is connected to a gate of the second PMOS transistor, the fourth node is connected to a gate of the first PMOS transistor, a gate of the third NMOS transistor is connected to the supply voltage, a gate of the fourth NMOS transistor is connected to the third node, and the third node is connected to the first transmission line; and

a driver for receiving an output signal of the receiver and outputting the received signal to the second transmission line, the driver comprising:

a fifth NMOS transistor connected between the supply voltage and a first node; and a sixth NMOS transistor connected between the first node and ground;

wherein the signal outputted to the second transmission line is equal to the signal applied to the receiver through the first transmission line, and

wherein an output voltage of the fourth node is applied complementary to gates of the fifth NMOS transistor and sixth NMOS transistor.

5. The line driving circuit as claimed in claim 4 , wherein the second transmission line is connected to an input node of an interior circuit in the semiconductor device.