IP Library › Granted Patent US 7,450,652
Granted Patent B2
US 7,450,652 · App. 10/993,105 · Granted Nov 11, 2008

Apparatus and method for receiving signals in an OFDM communication system

Assignees: Samsung Electronics Co., Ltd; Postech Foundation
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Quick Facts
Patent No.
US 7,450,652
App. No.
10/993,105
Granted
Nov 11, 2008
Kind
B2
Abstract

A receiving apparatus in an OFDM communication system, in which the receiving apparatus includes a serial-to-parallel converter that converts a serial signal received through an antenna to parallel signals. A pre-processor processes an nth symbol converted in the serial-to-parallel converter using an (n−1)th symbol and an (n+1)th symbol. A Fourier transformer Fourier-transforms the output of the pre-processor and an equalizer equalizes a Fourier-transformed signal. A deinterleaver deinterleaves an equalized signal, a decoder decodes a deinterleaved signal, and a parallel-to-serial converter converts parallel decoded signal to a signal stream.

Claims (36)

1. A receiving apparatus in an orthogonal frequency division multiplexing (OFDM) communication system, comprising:

a serial-to-parallel converter for converting a received serial signal to parallel signals comprising at least two successive symbols;

a pre-processor for processing an nth symbol using an (n−1)th symbol and an (n+1)th symbol;

a Fourier transformer for Fourier-transforming the output of the pre-processor;

an equalizer for equalizing a Fourier-transformed signal;

a deinterleaver for deinterleaving the equalized signal;

a decoder for decoding the deinterleaved signal; and

a parallel-to-serial converter for converting the parallel decoded signal to a signal stream

wherein the pre-processor recovers a cyclic prefix of the nth symbol using the (n−1)th symbol and the (n+1)th symbol, if the nth symbol is transmitted without the cyclic prefix.

2. The receiving apparatus of claim 1 , wherein the pre-processor comprises:

a delay for delaying the nth symbol by at least one symbol period;

an inter-symbol interference (ISI) remover for removing ISI from a delayed signal;

an inter-channel interference (ICI) remover for removing ICI from an ISI-removed signal;

a pre-iteration processor for recovering cyclicity of the ISI-removed signal using the (n+1)th symbol; and

a switch for selectively switching the outputs of the ICI remover and the pre-iteration processor to the Fourier transformer.

3. The receiving apparatus of claim 2 , wherein the pre-processor further comprises a cyclic prefix (CP) remover for removing a CP from the delayed signal received from the delay.

4. The receiving apparatus of claim 2 , wherein the pre-processor further comprises a feedback unit for processing the output of the decoder and providing information needed for the ISI remover and the ICI remover.

5. The receiving apparatus of claim 2 , wherein the pre-iteration processor extracts an nth symbol component from the (n+1)th symbol and adds the nth symbol component to the ISI-removed signal.

6. The receiving apparatus of claim 2 , wherein the switch switches the output of the pre-iteration processor to the Fourier transformer, if a number of pre-iteration processes in the pre-iteration processor is 1.

7. The receiving apparatus of claim 2 , wherein the switch switches the output of the ICI remover to the Fourier transformer, if a number of pre-iteration processes in the pre-iteration processor is larger than 1 and less than a predetermined value.

8. The receiving apparatus of claim 7 , wherein if the number of pre-iteration processes is at least equal to the predetermined value, the pre-iteration processor ends pre-iteration processing.

9. A data receiving method for a receiving apparatus in an orthogonal frequency division multiplexing (OFDM) communication system, comprising the steps of:

receiving at least two successive symbols;

pre-processing an nth symbol by recovering a cyclic prefix of the nth symbol using an (n−1)th symbol and an (n+1)th symbol, if the nth symbol is transmitted without the cyclic prefix;

Fourier-transforming the pre-processed signal; and

recovering a transmission signal by equalizing, deinterleaving, and decoding the Fourier-transformed signal.

10. The data receiving method of claim 9 , wherein the pre-processing step comprises the steps of:

removing ISI from the nth symbol;

removing ICI from the ISI-removed signal;

recovering cyclicity of the ISI-removed signal using the (n+1)th symbol; and

selecting one of the ICI-removed signal and the cyclicity-recovered signal for Fourier transformation.

11. The data receiving method of claim 10 , wherein the pre-processing step further comprises the step of removing a cyclic prefix (CP) from the nth symbol.

12. The data receiving method of claim 10 , wherein the pre-processing step further comprises the step of incrementing a number of preprocesses by 1, each time the cyclicity is recovered.

13. The data receiving method of claim 12 , wherein the cyclicity-recovered signal is selected, if the number of pre-processes is 1.

14. The data receiving method of claim 12 , wherein the ICI-removed signal is selected, ifs number of pre-processes is larger than 1 and less than a predetermined value.

15. The data receiving method of claim 14 , further comprising the step of ending the pre-processing, if the number of pre-processes is at least equal to the predetermined value.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Apr 4, 2005
From: PARK, CHEOL-JIN; KIM, EUNG-SUN; LEE, JONG-HYEUK; IM, GI-HONG; KIM, HO-JIN
To: SAMSUNG ELECTRONICS CO., LTD.; POSTECH FOUNDATION
Reel/Frame 016416/0986 →
Priority Claims (1)
KR 10-2003-0082592 · Nov 20, 2003 · national
Continuity (1)
Related Publication 20050157802A1 · Jul 21, 2005