High-voltage power semiconductor device
A semiconductor device, such as a metal-oxide semiconductor field-effect transistor, includes a semiconductor substrate, a drift layer formed on the substrate, a first and a second source region, and a JFET region defined between the first and the second source regions. The JFET region may have a short width and/or a higher concentration of impurities than the drift layer. The semiconductor device may also include a current spreading layer formed on the drift layer. The current spreading layer may also have a higher concentration of impurities than the drift layer.
1. A metal-oxide semiconductor field-effect transistor comprising:
a silicon-carbide substrate having a first concentration of first type impurities;
a drift semiconductor layer formed on a front side of the semiconductor substrate and having a second concentration of first type impurities less than the first concentration of first type impurities;
a current spreading semiconductor layer formed on a front side of the drift semiconductor layer;
a first source region;
a second source region;
a JFET region formed on a front side of the current spreading semiconductor layer and defined between the first source region and the second source region, the JFET region having a third concentration of first type impurities that is greater than the second concentration of first type impurities;
a plurality of source regions; and
a plurality of base contact regions,
wherein the plurality of source regions and the plurality of base contact regions form alternating strips of N-type doped regions and P-type doped regions, the alternating strips being substantially orthogonal to respective source electrodes formed over the first and the second source regions.
2. The metal-oxide semiconductor field-effect transistor of claim 1 , wherein the JFET region has a width of less than about three micrometers.
3. The metal-oxide semiconductor field-effect transistor of claim 2 , wherein the JFET region has a width of about one micrometer.
4. The metal-oxide semiconductor field-effect transistor of claim 1 , wherein the third concentration of first type impurities is at least one order of magnitude greater than the second concentration of first type impurities.
5. The metal-oxide semiconductor field-effect transistor of claim 1 , wherein the current spreading semiconductor layer has a fourth concentration of first type impurities that is greater than the second concentration of first type impurities.
6. The metal-oxide semiconductor field-effect transistor of claim 5 , wherein the fourth concentration of first type impurities is at least one order of magnitude greater than the second concentration of first type impurities.
7. The metal-oxide semiconductor field-effect transistor of claim 6 , wherein the JFET region has a width of about one micrometer.
8. The metal-oxide semiconductor field-effect transistor of claim 1 , further comprising a plurality of base contact regions formed in each of the first and the second source regions, the base contact regions being smaller than the first and second source regions.
9. A double-implanted metal-oxide semiconductor field-effect transistor comprising:
a silicon-carbide substrate;
a drift semiconductor layer formed on a front side of the semiconductor substrate;
a first source region;
a first source electrode formed over the first source region, the first source electrode defining a longitudinal axis;
a plurality of first base contact regions defined in the first source region, each of the plurality of first base contact regions being spaced apart from each other in a direction parallel to the longitudinal axis defined by the first source electrode;
a second source region;
a second source electrode formed over the second source region, the second source electrode defining a longitudinal axis;
a plurality of second base contact regions defined in the second source region, each of the plurality of second base contact regions being spaced apart from each other in a direction parallel to the longitudinal axis defined by the second source electrode; and
a JFET region defined between the first source region and the second source region, the JFET region having a width less than about three micrometers.
10. The double-implanted metal-oxide semiconductor field-effect transistor of claim 9 , wherein the JFET region has a width of about one micrometer.
11. The double-implanted metal-oxide semiconductor field-effect transistor of claim 9 , wherein the JFET region has a first concentration of first type impurities and the drift semiconductor layer has a second concentration of first type impurities, the first concentration of first type impurities being greater than the second concentration of first type impurities.
12. A double-implanted metal-oxide semiconductor field-effect transistor comprising:
a semiconductor substrate;
a drift semiconductor layer formed on a front side of the semiconductor substrate;
a current spreading semiconductor layer formed on a front side of the drift semiconductor layer;
a plurality of first and second source regions;
a plurality of base contact regions; and
a JFET region defined between the plurality of first source regions and the plurality of second source regions, the JFET region being formed on a front side of the current spreading semiconductor layer,
wherein the plurality of first and second source regions and the plurality of base contact regions form alternating strips of N-type doped regions and P-type doped regions, each of the alternating strips defining a longitudinal axis that is substantially orthogonal to a longitudinal axis defined by respective source electrodes formed over the first and the second source regions.
13. The double-implanted metal-oxide semiconductor field-effect transistor of claim 12 , wherein the current spreading semiconductor layer has a first concentration of first type impurities and the drift semiconductor layer has a second concentration of first type impurities, the first concentration of first type impurities being greater than the second concentration of first type impurities.
14. The double-implanted metal-oxide semiconductor field-effect transistor of claim 13 , wherein the first concentration of first type impurities is at least one order of magnitude greater than the second concentration of first type impurities.
15. The double-implanted metal-oxide semiconductor field-effect transistor of claim 12 , wherein the JFET region has a width of about three micrometers or less.