IP Library Granted Patent US 7,498,849
Granted Patent B2
US 7,498,849 · App. 11/985,427 · Granted Mar 3, 2009

Sense amplifiers with high voltage swing

Assignee: Spansion LLC
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Quick Facts
Patent No.
US 7,498,849
App. No.
11/985,427
Granted
Mar 3, 2009
Kind
B2
Abstract

A sense amplifier includes a reference voltage generator for generating a reference output voltage and a core output voltage generator for generating a core output voltage. The core output voltage generator includes a core front-end stage and a core back-end stage or includes a plurality of amplifier transistors each conducting a portion of a core current through a current conducting device such as core cell. The sizes and/or connections of transistors of such components result in high voltage swing and thus high sensitivity of the sense amplifier.

Claims (34)

1. A sense amplifier comprising:

a reference voltage generator for generating a reference output voltage; and

a core output voltage generator for generating a core output voltage, the core output voltage generator including:

a plurality of amplifier transistors each conducting a portion of a core current through a current conducting device;

wherein a gate of a selected one of the amplifier transistors has the core output voltage generated thereon;

and wherein the reference voltage generator includes:

a plurality of reference transistors each conducting a portion of a reference current through a reference cell;

wherein gates of the reference transistors are coupled together with the reference output voltage generated thereon, and wherein drains of the reference transistors are coupled together at a reference bit node having a reference bit voltage generated thereon, and wherein sources of the reference transistors are coupled to a power supply.

2. The sense amplifier of claim 1 , further including:

a reference feed-back regulator coupled to the gates and the drains of the reference transistors for maintaining the reference bit voltage.

3. A sense amplifier comprising:

a reference voltage generator for generating a reference output voltage; and

a core output voltage generator for generating a core output voltage, the core output voltage generator including:

a plurality of amplifier transistors each conducting a portion of a core current through a current conducting device;

wherein a gate of a selected one of the amplifier transistors has the core output voltage generated thereon,

and wherein another one of the amplifier transistors has a gate with the reference output voltage applied thereon.

4. The sense amplifier of claim 3 , wherein the current conducting device is a core cell of a memory device.

5. The sense amplifier of claim 3 , wherein a width to length (W/L) ratio of the selected amplifier transistor is minimized.

6. The sense amplifier of claim 3 , wherein drains of the amplifier transistors are coupled together at a bit node having a core bit voltage generated thereon, and wherein sources of the amplifier transistors are coupled to a power supply.

7. The sense amplifier of claim 6 , further including:

a core feed-back regulator coupled to the gate and the drain of the selected amplifier transistor for maintaining the core bit voltage.

8. The sense amplifier of claim 3 , wherein the reference voltage generator includes:

a plurality of reference transistors each conducting a portion of a reference current through a reference cell;

wherein gates of the reference transistors are coupled together with the reference output voltage generated thereon, and wherein drains of the reference transistors are coupled together at a reference bit node having a reference bit voltage generated thereon,

and wherein sources of the reference transistors are coupled to a power supply.

9. The sense amplifier of claim 8 , further including:

a reference feed-back regulator coupled to the gates and the drains of the reference transistors for maintaining the reference bit voltage.

10. The sense amplifier of claim 1 , wherein the current conducting device is a core cell of a memory device.

11. The sense amplifier of claim 1 , wherein a width to length (W/L) ratio of the selected amplifier transistor is minimized.

12. The sense amplifier of claim 1 , wherein drains of the amplifier transistors are coupled together at a bit node having a core bit voltage generated thereon, and wherein sources of the amplifier transistors are coupled to a power supply.

13. The sense amplifier of claim 12 , further including:

a core feed-back regulator coupled to the gate and the drain of the selected amplifier transistor for maintaining the core bit voltage.

14. The sense amplifier of claim 1 , wherein another one of the amplifier transistors has the reference output voltage applied thereon.

15. The sense amplifier of claim 14 , wherein a gate of said another one of the amplifier transistors has the reference output voltage applied thereon.

Assignments (10)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Apr 15, 2022
From: CYPRESS SEMICONDUCTOR CORPORATION
To: INFINEON TECHNOLOGIES LLC
Reel/Frame 059721/0467 →
RELEASE OF SECURITY INTEREST Recorded Mar 16, 2022
From: MUFG UNION BANK, N.A.
To: CYPRESS SEMICONDUCTOR CORPORATION; SPANSION LLC
Reel/Frame 059410/0438 →
CORRECTIVE ASSIGNMENT TO CORRECT THE 8647899 PREVIOUSLY RECORDED ON REEL 035240 FRAME 0429. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY INTERST. Recorded Nov 3, 2020
From: CYPRESS SEMICONDUCTOR CORPORATION; SPANSION LLC
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 058002/0470 →
ASSIGNMENT AND ASSUMPTION OF SECURITY INTEREST IN INTELLECTUAL PROPERTY Recorded Oct 28, 2019
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: MUFG UNION BANK, N.A.
Reel/Frame 050896/0366 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jun 18, 2018
From: SPANSION LLC
To: CYPRESS SEMICONDUCTOR CORPORATION
Reel/Frame 046392/0613 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jun 15, 2018
From: AKAOGI, TAKAO; WADHWA, SAMEER; VENKATESH, BHIMACHAR; ACHTER, MICHAEL
To: SPANSION LLC
Reel/Frame 046100/0279 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jul 1, 2015
From: SPANSION, LLC
To: CYPRESS SEMICONDUCTOR CORPORATION
Reel/Frame 036044/0745 →
SECURITY INTEREST Recorded Mar 21, 2015
From: CYPRESS SEMICONDUCTOR CORPORATION; SPANSION LLC
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 035240/0429 →
RELEASE OF SECURITY INTEREST Recorded Mar 13, 2015
From: BARCLAYS BANK PLC
To: SPANSION LLC; SPANSION INC.; SPANSION TECHNOLOGY LLC
Reel/Frame 035201/0159 →
SECURITY AGREEMENT Recorded Jun 4, 2010
From: SPANSION LLC; SPANSION INC.; SPANSION TECHNOLOGY INC.; SPANSION TECHNOLOGY LLC
To: BARCLAYS BANK PLC
Reel/Frame 024522/0338 →
Continuity (2)
Division 1102425700 · Dec 28, 2004
Related Publication 20080068046A1 · Mar 20, 2008