Ferroelectric memory and its manufacturing method

1. A method for manufacturing a ferroelectric memory, the method comprising the steps of:

forming an interlayer dielectric layer above a substrate;

forming a plug in the interlayer dielectric layer;

forming a first and second ferroelectric capacitors on the interlayer dielectric layer, the plug being formed between the first and second ferroelectric capacitors;

forming a coating layer that covers each of the ferroelectric capacitors having a first opening section provided between the plurality of ferroelectric capacitors;

forming a second opening section that is connected to the first opening section and provided in the coating layer and the interlayer dielectric layer;

after forming the plug, the first and second ferroelectric capacitors, the coating layer, and the first and second opening sections, forming a conductive layer in the first and second opening sections and above the coating layer, the conductive layer being directly connected to the plug; and

polishing at least the conductive layer.

2. The method according to claim 1 , wherein the conductive layer and the coating layer are polished.

3. The method according to claim 1 , the conductive layer being composed of a first portion and a second portion disposed on the first portion, a width of the first portion being smaller than a width of the second portion.

4. The method according to claim 3 , a width of the plug being smaller than the width of the first portion of the conductive layer.

5. The method according to claim 1 , an upper surface of the conductive layer being as high as an upper surface of the interlayer dielectric layer.

6. The method according to claim 1 , the first ferroelectric capacitor having a first ellipsoidal shape in a top view, the first ellipsoidal shape having a first major axis, the first major axis being inclined with respect to a direction of rows.

7. The method according to claim 6 , the second ferroelectric capacitor having a second ellipsoidal shape in the top view, the second ellipsoidal shape having a second major axis, the second major axis being inclined with respect to the direction of the rows.

8. A ferroelectric memory comprising:

a substrate;

a first interlayer dielectric layer formed above the substrate, the first interlayer dielectric layer including a plug;

a second interlayer dielectric layer formed above the first interlayer dielectric layer;

a first ferroelectric capacitor and a second ferroelectric capacitor formed above the second interlayer dielectric layer;

a third interlayer dielectric layer formed above the first ferroelectric capacitor and the second ferroelectric capacitor; and

a conductive layer formed between the first ferroelectric capacitor and the second ferroelectric capacitor and connected to the plug.

9. The ferroelectric memory according to claim 8 , the conductive layer being composed of a first portion and a second portion disposed on the first portion, a width of the first portion being smaller than a width of the second portion.

10. The ferroelectric memory according to claim 9 , a width of the plug being smaller than the width of the first portion of the conductive layer.

11. The ferroelectric memory according to claim 8 , an upper surface of the conductive layer being as high as an upper surface of the interlayer dielectric layer.

12. The memory according to claim 8 , the first ferroelectric capacitor having a first ellipsoidal shape in a top view, the first ellipsoidal shape having a first major axis, the first major axis being inclined with respect to a direction of rows.

13. The memory according to claim 12 , the second ferroelectric capacitor having a second ellipsoidal shape in the top view, the second ellipsoidal shape having a second major axis, the second major axis being inclined with respect to the direction of the rows.

14. The memory of claim 8 , wherein the conductive layer is directly connected to the plug.