Method for system level protection of field programmable logic devices
View Patent ↗A method for protecting a dynamically reconfigurable computing system includes generating an encoding key and passing the encoding key, through a system level bus, to at least one field programmable logic device and to a function library included within the system. The function library contains a plurality of functions for selective programming into the at least one field programmable logic device. A lock is generated so as to prevent external resources with respect to the system from accessing the encoding key during the passing thereof.
1. A method for protecting a dynamically reconfigurable computing system, the method comprising:
generating an encoding key;
passing said encoding key, through a system level bus, to at least one field programmable logic device included within the system;
passing said encoding key, through said system level bus, to a function library included within the system, said function library containing a plurality of functions for selective programming into said at least one field programmable logic device, wherein said encoding key is stored within a write-once register configured within said at least one field programmable logic device and said function library;
generating a lock so as to prevent external resources with respect to the system from accessing said encoding key during said passing thereof, wherein said generating an encoding key and said generating a lock is implemented during a power-on reset of the system; and
utilizing said encoding key for decoding configuration data sent from said library to said at least one field programmable logic device, wherein during a functional mode of operation, data is passed directly between said at least one field programmable logic device and said system bus.
2. The method of claim 1 , wherein said write-once register is configured to be written thereto only during said power-on reset.
3. A method for protecting a dynamically reconfigurable computing system, the method comprising:
generating an encoding key;
passing said encoding key, through a system level bus, to at least one field programmable logic device included within the system;
passing said encoding key, through said system level bus, to a function library included within the system, said function library containing a plurality of functions for selective programming into said at least one field programmable logic device, wherein said encoding key is stored within a write-once register configured within said at least one field programmable logic device and said function library;
generating a lock so as to prevent external resources with respect to the system from accessing said encoding key during said passing thereof, wherein said generating an encoding key and said generating a lock is implemented during a power-on reset of the system; and
utilizing said encoding key for decoding configuration data sent from said library to said at least one field programmable logic device, wherein the contents of said write-once register m said at least one field programmable logic device are viewable only by decoding logic configured within said at least one field programmable logic device.
4. The method of claim 3 , wherein said write-once register is configured to be written thereto only during said power-on reset.