IP Library Granted Patent US 7,536,564
Granted Patent B2
US 7,536,564 · App. 10/476,359 · Granted May 19, 2009

Method for encrypting a calculation using a modular function

Assignee: STMicroelectronics S.A.
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Quick Facts
Patent No.
US 7,536,564
App. No.
10/476,359
Granted
May 19, 2009
Kind
B2
Abstract

The invention concerns a method for encrypting, with a random quantity (r), a calculation using at least a modular operation ( 3 ), the method consisting in multiplying a first modulo (n) by said random quantity, in taking as modulo of the operation, the result (m) of said multiplication and in carrying out a modular reduction of the result of the operation, on the basis of the first modulo (n).

Claims (29)

1. A method for scrambling, by means of a random value, a calculation involving a modular operation to be performed by an electronic circuit, the method comprising:

accepting as an input to the electronic circuit at least one input datum;

multiplying a first modulo by said random value to yield a product;

performing the modular operation to yield a first result, the modular operation using as operands the product of the multiplication and the at least one input datum;

performing a modular reduction, using the first modulo as an operand, of the first result of the modular operation, the modular reduction yielding a second result; and

outputting, from the electronic circuit, the second result of the modular reduction.

2. The method of claim 1 , wherein said modular operation involves the at least one input datum as well as at least one secret datum.

3. The method of claim 2 wherein said secret datum is contained in the electronic circuit implementing the method.

4. A circuit for scrambling a calculation performed by an integrated circuit, comprising:

an input terminal adapted to receive an input value;

a processing circuit adapted to perform processing steps on the value, the processing steps comprising

multiplying a first modulo by said random value to yield a product,

performing a modular operation to yield a first result using as operands the product of the multiplication and the value,

performing a modular reduction, using the first modulo as an operand, of the first result of the modular operation, the modular reduction yielding a second result, and

storing the second result as a result of the processing steps; and

an output terminal adapted to output the result of the processing steps.

5. The circuit of claim 4 , wherein the processing circuit is a microcontroller and the circuit further comprises at least one memory storing computer-executable instructions to be executed by the microcontroller.

6. The circuit of claim 4 , wherein the processing circuit is a hard-wired logic state machine.

7. The circuit of claim 4 , farther comprising at least one memory storing a secret datum.

8. A method of protecting a secret datum and an authentication calculation to be performed by an electronic circuit based at least in part on the secret datum, the method comprising:

accepting as input to the electronic circuit an input value;

determining a random value;

multiplying a first value by the random value to calculate a first operand;

performing the authentication calculation on the input value, the authentication calculation comprising a first modulo operation using the first operand as a divisor, the first modulo operation calculating a second operand;

determining a result by performing a second modulo operation using the second operand as a dividend and the first value as a divisor; and outputting, from the electronic circuit, the result.

9. The method of claim 8 , wherein the random value is determined by a pseudo-random process.

10. The method of claim 8 , wherein the random value is only used in the act of multiplying.

11. The method of claim 8 , further comprising clearing the random value from memory immediately following the act of multiplying.

12. The method of claim 8 , wherein the authentication calculation comprises at least one operation involving the input value and a secret datum.

Assignments (2)
CHANGE OF NAME Recorded Jan 21, 2024
From: STMICROELECTRONICS SA
To: STMICROELECTRONICS FRANCE
Reel/Frame 066357/0327 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Apr 28, 2004
From: LIARDET, PIERRE-YVAN; ROMAIN, FABRICE
To: STMICROELECTRONICS S.A.
Reel/Frame 015274/0594 →
Priority Claims (1)
FR 01 05815 · Apr 30, 2001 · national
Continuity (1)
Related Publication 20040179680A1 · Sep 16, 2004