Circuit configurations to reduce snapback of a transient voltage suppressor
This invention discloses an electronic device formed as an integrated circuit (IC) wherein the electronic device further includes a transient voltage suppressing (TVS) circuit. The TVS circuit includes a triggering Zener diode connected between an emitter and a collector of a bipolar-junction transistor (BJT) wherein the Zener diode having a reverse breakdown voltage BV less than or equal to a BVceo of the BJT where BVceo stands for a collector to emitter breakdown voltage with base left open. The TVS circuit further includes a rectifier connected in parallel to the BJT for triggering a rectified current through the rectifier for further limiting an increase of a reverse blocking voltage. In a preferred embodiment, the triggering Zener diode, the BJT and the rectifier are formed in a semiconductor substrate by implanting and configuring dopant regions of a first and a second conductivity types in a N-well and a P-well whereby the TVS can be formed in parallel as part of the manufacturing processes of the electronic device.
1. A method for manufacturing an electronic device with an integrated transient voltage suppressing (TVS) circuit comprising:
connecting a triggering diode between an emitter and a collector of a first bipolar-junction transistor (BJT) with said triggering diode having a reverse breakdown voltage BV less than or equal to a BVceo of said first BJT where BVceo stands for a collector to emitter breakdown voltage with base left open;
connecting a second BJT with said first BJT forming a SCR whereas said first BJT triggering a SCR current through said SCR for further limiting an increase of a reverse blocking voltage; and
said step of connecting said triggering diode and said SCR is a step of forming said triggering diode and said SCR on an integrated circuit (IC) chip.
2. The method of claim 1 wherein said method further comprising:
said step of connecting said triggering diode between an emitter and a collector of a bipolar-junction transistor (BJT) comprising a step of connecting said a Zener diode to a bipolar junction transistor(BJT).
3. The method of claim 1 wherein:
said step of connecting said triggering diode between an emitter and a collector of a bipolar-junction transistor (BJT) comprising a step of connecting said diode to a NPN bipolar junction transistor(BJT).
4. The method of claim 1 wherein:
said step of employing said triggering diode for triggering said first BJT for transmitting a current through said first BJT in a BR mode further including a step of turning on said rectifier at a higher reverse current than an initial current transmitting through said first BJT.
5. The method of claim 1 wherein:
connecting at least a steering diode in parallel to said triggering diode for electrically connecting to an input pad for steering a normal current between a high voltage and a low voltage terminal.
6. The method of claim 1 further comprising:
integrating said triggering diode and said SCR with said electronic device on a single chip.
7. The method of claim 1 wherein:
manufacturing said triggering diode and said SCR with a standard CMOS technology and integrated with said electronic device on a single chip.
8. The method of claim 1 wherein:
manufacturing said triggering diode and said SCR with a standard Bi-CMOS technology and integrated with said electronic device on a single chip.
9. The method of claim 1 further comprising a method of:
tailored said reverse breakdown voltage BV of said triggering diode.
10. The method of claim 1 wherein:
suppressing a latch-up during an ESD transients between an I/O pad to a high voltage Vcc terminal of said TVS by providing a guard ring for said TVS.
11. The method of claim 1 further comprising:
said steps of connecting a triggering Zener diode to said BJT and said rectifier further comprising a step of forming in a semiconductor substrate by implanting and configuring dopant regions of a first and a second conductivity types in a N-well and a P-well whereby said TVS can be formed in parallel as part of the manufacturing processes of said electronic device.