IP Library › Granted Patent US 7,540,970
Granted Patent B2
US 7,540,970 · App. 11/429,071 · Granted Jun 2, 2009

Methods of fabricating a semiconductor device

Assignee: Samsung Electronics Co., Ltd.
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Quick Facts
Patent No.
US 7,540,970
App. No.
11/429,071
Granted
Jun 2, 2009
Kind
B2
Abstract

Methods of fabricating a semiconductor device are provided. Methods of forming a finer pattern of a semiconductor device using a buffer layer for retarding, or preventing, bridge formation between patterns in the formation of a finer pattern below resolution limits of a photolithography process by double patterning are also provided. A first hard mask layer and/or a second hard mask layer may be formed on a layer of a substrate to be etched. A first etch mask pattern of a first pitch may be formed on the second hard mask layer. After a buffer layer is formed on the overall surface of the substrate, a second etch mask pattern of a second pitch may be formed thereon in a region between the first etch mask pattern. The buffer layer may be anisotropically etched using the second etch mask pattern as an etch mask, forming a buffer layer pattern. The second hard mask layer may be anisotropically etched using the first etch mask pattern and/or the buffer layer pattern as etch masks, forming a second hard mask pattern. The first hard mask layer may be anisotropically etched using the second hard mask pattern as an etch mask, forming a first hard mask pattern. The etched layer may be anisotropically etched using the first hard mask pattern as an etch mask.

Claims (40)

1. A method of fabricating a semiconductor device comprising:

depositing a base layer on a substrate;

forming a first hard mask layer on the base layer;

forming a second hard mask layer on the first hard mask layer;

forming a first etch mask pattern on the second hard mask layer wherein the first etch mask pattern is repeatedly formed having a first pitch;

forming a buffer layer on a surface of a resultant structure having the first etch mask pattern;

forming a second etch mask pattern on the buffer layer using a photolithography process, wherein the second etch mask pattern is repeatedly formed having the first pitch between the first etch mask pattern;

etching the buffer layer using the second etch mask pattern as an etch mask, forming a buffer layer pattern;

etching the second hard mask layer using the first etch mask pattern and the buffer layer pattern as etch masks, forming a second hard mask pattern having a second pitch wherein the second pitch is a half of the first pitch;

etching the first hard mask layer using the second hard mask pattern as an etch mask, forming a first hard mask pattern which is repeatedly formed having the second pitch; and

etching the base layer using the first hard mask pattern as an etch mask, forming a pattern which is repeatedly formed having the second pitch.

2. The method according to claim 1 , wherein the first hard mask layer is formed of an amorphous carbon layer (ACL).

3. The method according to claim 1 , wherein forming the first etch mask pattern includes forming a single layer of a material selected from the group consisting of an oxide layer, a nitride layer, an oxynitride layer and a polysilicon layer or a composite layer thereof.

4. The method according to claim 1 ,

wherein forming the first etch mask pattern includes forming a third hard mask layer on the second hard mask layer; forming a first photoresist pattern having the first pitch on the third hard mask layer; and etching the third hard mask layer using the first photoresist pattern as an etch mask, forming a third hard mask pattern.

5. The method according to claim 4 , wherein forming the second hard mask layer includes using a material having different etch characteristics than etch characteristics of the first hard mask layer; and forming a single layer of a material selected from the group consisting of an oxide layer, a nitride layer, an oxynitride layer and a polysilicon layer or a composite layer thereof.

6. The method according to claim 4 , wherein forming the third hard mask layer includes using a material having different etch characteristics than etch characteristics of the second hard mask layer; and

forming a single layer, wherein the material is selected from the group consisting of an oxide layer, a nitride layer, an oxynitride layer and a polysilicon layer or a composite layer thereof.

7. The method according to claim 1 ,

wherein forming the first etch mask pattern includes forming a first photoresist pattern having the first pitch on the second hard mask layer; and etching a portion of the second hard mask layer to a desired thickness from a total thickness of the second hard mask layer, using the first photoresist pattern as an etch mask, forming a protrusion portion under the first photoresist pattern.

8. The method according to claim 7 , wherein forming the second hard mask layer includes using a material having different etch characteristics than etch characteristics of the first hard mask layer; and forming a single layer of a material selected from the group consisting of an oxide layer, a nitride layer, an oxynitride layer and a polysilicon layer or a composite layer thereof.

9. The method according to claim 1 , further comprising:

forming a capping layer on the surface of the resultant structure having the first etch mask pattern prior to forming the buffer layer.

10. The method according to claim 9 , wherein forming the second hard mask layer includes using a material having different etch characteristics than etch characteristics of the first hard mask layer; and forming a single layer of a material selected from the group consisting of an oxide layer, a nitride layer, an oxynitride layer and a polysilicon layer or a composite layer thereof.

11. The method according to claim 9 , wherein forming the capping layer includes using at least one material selected from the group of an ACL, an organic anti-reflective coating (ARC) layer, lower viscosity polymer, an oxide layer and an oxynitride layer.

12. The method according to claim 9 , wherein the capping layer is formed with a thickness of about 50 Å-1000 Å.

13. The method according to claim 9 , wherein forming the capping layer includes forming a capping material layer on the surface of the resultant structure having the first etch mask pattern; and performing multi-steps of thermal treatment on the capping material layer.

14. The method according to claim 13 , wherein the multi-steps of thermal treatment includes sequentially performing a soft bake process of thermally processing at a first temperature and a hard bake process of thermally processing at a second temperature higher than the first temperature.

15. The method according to claim 1 , wherein forming the buffer layer includes using a bottom resist material in a bi-layer resist (BLR) process, and forming the second etch mask pattern includes using a photoresist pattern containing silicon (Si).

16. The method according to claim 15 , wherein forming the buffer layer includes coating the surface of the resultant structure having the first etch mask pattern with the bottom resist material; and baking the bottom resist material by a hard bake process.

17. The method according to claim 1 , further comprising:

forming a fourth hard mask layer on the buffer layer, prior to forming the second etch mask pattern; and

etching the fourth hard mask layer using the second etch mask pattern as an etch mask, forming a fourth hard mask pattern.

18. The method according to claim 17 , wherein forming the buffer layer includes using an amorphous carbon layer (ACL) or a bottom resist material; and forming the fourth hard mask layer includes using a material having different etch characteristics than etch characteristics of the buffer layer material.

19. The method according to claim 17 , wherein forming the fourth hard mask layer includes using a single layer wherein the material is selected from the group consisting of an oxide layer, a nitride layer, an oxynitride layer and a polysilicon layer or a composite layer thereof.

20. The method according to claim 1 , wherein forming the buffer layer includes covering any height differences on the substrate; and forming a flat upper surface.

21. The method according to claim 1 , wherein forming the buffer layer includes depositing a buffer material on the surface of the resultant structure having the first etch mask pattern; and polishing the deposited buffer material such that an upper surface thereof is planarized.

22. The method according to claim 1 , further comprising:

forming an organic anti-reflective coating (ARC) layer on the surface of the resultant structure having the first etch mask pattern, prior to forming the buffer layer.

23. The method according to claim 1 , forming the second etch mask pattern includes forming a third hard mask layer on the buffer layer; forming a second photoresist pattern having the first pitch on the third hard mask layer; and etching the third hard mask layer using the second photoresist pattern as an etch mask, forming a third hard mask pattern.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 8, 2006
From: KOH, CHA-WON; WOO, SANG-GYUN; NAM, JEONG-LIM; CHI, KYEONG-KOO; OH, SEOK-HWAN; YEO, GI-SUNG; CHUNG, SEUNG-PIL; PARK, HEUNG SIK
To: SAMSUNG ELECTRONICS CO., LTD.
Reel/Frame 017912/0994 →
Priority Claims (1)
KR 10-2005-0067292 · Jul 25, 2005 · national
Continuity (1)
Related Publication 20070020565A1 · Jan 25, 2007