Thin film transistor, manufacturing method thereof, and active matrix display apparatus
A thin film transistor includes a metal substrate, a first conductive barrier layer placed on the metal substrate to prevent diffusion of substance of the metal substrate, a protective insulating film placed on the first conductive barrier layer, a semiconductor layer placed on the protective insulating film and including a source region, a drain region and a channel region, a gate insulating film placed on the semiconductor layer, and a gate electrode placed above the semiconductor layer with the gate insulating film interposed therebetween. The first conductive barrier layer and the semiconductor layer are electrically connected through a first opening of the protective insulating film.
1. A thin film transistor comprising:
a metal substrate;
a first conductive barrier layer disposed on the metal substrate to prevent diffusion of a substance of the metal substrate;
a protective insulating film disposed on the first conductive barrier layer and having an opening;
a semiconductor layer disposed on the protective insulating film, including a source region, a drain region and a channel region, and the channel region is directly connected with the first conductive barrier layer through the opening;
a gate insulating film disposed on the semiconductor layer; and
a gate electrode disposed above the semiconductor layer with the gate insulating film interposed between the gate electrode and the semiconductor layer.
2. The thin film transistor according to claim 1 , wherein
the first conductive barrier layer at least partly fills the opening of the protective insulating film.
3. The thin film transistor according to claim 2 , wherein
the first conductive barrier layer fills the opening and extends over the protective insulating film.
4. The thin film transistor according to claim 3 , wherein
the first conductive barrier layer comprises a high melting point metal or a conductive high melting point metal nitride.
5. The thin film transistor according to claim 3 , wherein
the first conductive barrier layer is a film containing at least one of Ti, Ta, W, Mo, TiN, TaN, W, MoN, ZrN, VN, HfN, NbN, TiZrN, and ZrVN.
6. The thin film transistor according to claim 3 , wherein
the protective insulating film is a single-layer film or a composite film including at least one of a silicon oxide film, a silicon nitride film and a silicon nitride/oxide film.
7. An active matrix display apparatus comprising:
a thin film transistor according to claim 3 ; and
a capacitor disposed on the metal substrate and including a first capacitor electrode and a second capacitor electrode.
8. The thin film transistor according to claim 1 , wherein
the first conductive barrier layer comprises a high melting point metal or a conductive high melting point metal nitride.
9. The thin film transistor according to claim 1 , wherein the first conductive barrier layer is a film containing at least one of Ti, Ta, W, Mo, TiN, TaN, W, MoN, ZrN, VN, HfN, NbN, TiZrN, and ZrVN.
10. The thin film transistor according to claim 1 , wherein
the protective insulating film is a single-layer film or a composite film including at least one of a silicon oxide film, a silicon nitride film and a silicon nitride/oxide film.
11. An active matrix display apparatus comprising:
a thin film transistor according to claim 1 ; and
a capacitor disposed on the metal substrate and including a first capacitor electrode and a second capacitor electrode.
12. The active matrix display apparatus according to claim 11 , wherein
the first capacitor electrode is formed of a same material as the semiconductor layer.
13. The active matrix display apparatus according to claim 11 , wherein
a second conductive barrier layer is disposed between the first capacitor electrode and the protective insulating film.
14. The active matrix display apparatus according to claim 11 , wherein
the protective insulating film has a second opening, and
the capacitor is placed in a position corresponding to the second opening, and the first capacitor electrode is formed of the first conductive barrier layer.
15. The active matrix display apparatus according to claim 14 , wherein
the first conductive barrier layer at least partly fills each of the first opening and the second opening.
16. The active matrix display apparatus according to claim 11 , wherein
a capacitor insulating film placed between the first capacitor electrode and the second capacitor electrode is formed of a same substance as the gate insulating film.
17. The active matrix display apparatus according to claim 11 , wherein
the gate electrode and the second capacitor electrode are formed of a same material.
18. The active matrix display apparatus according to claim 11 , further comprising:
a first interlayer insulating film to cover the thin film transistor and the capacitor;
a line electrically connected with the first conductive barrier layer through a contact hole of the first interlayer insulating film;
a second interlayer insulating film to cover the first interlayer insulating film and the line; and
a pixel electrode electrically connected with the drain region through a contact hole of the second interlayer insulating film.
19. The active matrix display apparatus according to claim 18 , wherein
a surface roughness of the second interlayer insulating film is 50 nm or less at an RMS (Root Mean Square) value in an area of 100 μm 2 .
20. The active matrix display apparatus according to claim 18 , wherein
a surface roughness of the pixel electrode is 50 nm or less at an RMS (Root Mean Square) value in an area of 100 μm 2 .
21. The active matrix display apparatus according to claim 18 , further comprising:
a counter electrode disposed opposite to the pixel electrode with a luminous layer interposed therebetween and electrically connected with the line or the first conductive barrier layer through an opening of the second interlayer insulating film.
22. A manufacturing method of a thin film transistor comprising:
forming a first conductive barrier layer on a metal substrate to prevent diffusion of substance of the metal substrate;
forming a protective insulating film having an opening on the first conductive barrier layer;
forming a semiconductor layer, including a source region, a drain region and a channel region, wherein the channel region is directly connected with the first conductive barrier layer through the opening of the protective insulating film;
forming a gate insulating film on the semiconductor layer; and
forming a gate electrode on the gate insulating film.
23. The manufacturing method of a thin film transistor according to claim 22 , wherein
the first conductive barrier layer at least partly fills the opening of the protective insulating film.
24. The manufacturing method of a thin film transistor according to claim 22 , wherein
a part of the semiconductor layer at least partly fills the opening of the protective insulating film.