Method of manufacturing a semiconductor device
In an embodiment, a simplified method of manufacturing a semiconductor device reduces a step between cell and peripheral areas. First and second openings are formed through a plurality of thin layers including a support layer on a substrate. A storage electrode and a guide ring are formed on sidewalls and bottoms of the first and second openings, respectively. A support pattern is formed so that the support layer in the cell area is partially etched and the support layer in the peripheral area remains un-etched, thus the support pattern supports and surrounds the storage electrodes adjacent to each other in the cell area and prevents an etching of a layer underlying the support layer in the peripheral area. A dielectric layer and a plate electrode are formed on the storage electrode to complete a semiconductor device with the reduced step.
1. A method of manufacturing a semiconductor device, comprising:
forming a first opening and a second opening through a plurality of thin layers including a support layer on a substrate, the first opening exposing a top surface of a contact pad formed in a cell area of the substrate, and the second opening being formed in a boundary region of both the cell area and a peripheral area of the substrate;
forming a storage electrode on a sidewall and a bottom of the first opening and forming a guide ring on a sidewall and a bottom of the second opening by removing portions of a conductive layer not formed along the sidewalls and bottoms of the first and second openings, wherein forming the storage electrode and the guide ring includes forming the conductive layer on the sidewalls and bottoms of the first and second openings and on the thin layers, forming a sacrificial layer on the conductive layer to a sufficient thickness to fill the first and second openings, wherein the sacrificial layer comprises an insulation material, and removing the sacrificial layer and the conductive layer until one of the thin layers is exposed, so that the sacrificial layer and the conductive layer remain only in the first and second openings;
forming a mesh-shaped support pattern by etching the thin layers so that the support layer in the cell area is partially etched and the support layer in the peripheral area remains un-etched to thereby be exposed, so that the mesh-shaped support pattern supports and surrounds a plurality of storage electrodes adjacent to each other in the cell area and prevents a layer underlying the support layer from being etched in the peripheral area, wherein forming the mesh-shaped support pattern includes
removing a portion of the thin layers on the support layer and an upper portion of the sacrificial layer in the first and second openings until a top surface of the support layer, upper portions of the storage electrode, and the guide ring are exposed,
forming a spacer oxide layer on the top surface of the support layer, on a top surface of the sacrificial layer, and on exposed surfaces of the storage electrode and the guide ring, the spacer oxide layer formed to be thicker in the peripheral area than in the cell area,
anisotropically etching the spacer oxide layer so that a first portion of the spacer oxide layer in a relatively large interval between the storage electrodes in the cell area is sufficiently removed to expose the support layer and to form a spacer on sidewalls of the exposed storage electrode and guide ring, and a second portion of the spacer oxide layer in a relatively small interval between the storage electrodes in the cell region and a third portion of the spacer oxide layer on the support layer in the peripheral area are not substantially removed, and
etching the exposed support layer using the spacer as an etching mask; and
sequentially forming a dielectric layer and a plate electrode on the storage electrode and the guide ring.
2. The method of claim 1 , further comprising forming a metal contact plug through which a top surface of the plate electrode in the second opening is exposed, the metal contact plug being formed by etching an insulation interlayer on the plate electrode and having a width smaller than a width of the second opening.
3. The method of claim 2 , further including forming the second opening with a relatively large width at a portion in which the metal contact plug is formed and a relatively small width at a remaining portion thereof.
4. The method of claim 1 , wherein the support layer comprises silicon nitride.
5. The method of claim 1 , wherein the plurality of the thin layers except the support layer has an etching selectivity with respect to the support layer.
6. The method of claim 1 , further including forming a plurality of protruding portions on the bottom of the second opening for facilitating a filling of the second opening.
7. The method of claim 1 , wherein the spacer oxide layer includes a boron phosphorous silicate glass (BPSG) layer or an undoped silicate glass (USG) layer.